National HCSS Conference 2010

National High Confidence Software and Systems Conference 2010
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Visible to the public Replacing Testing with Formal Verification in Intel® Core™ i7 Processor Execution Engine Validation

Abstract

Formal verification of arithmetic data-paths has been part of the established methodology for most Intel processor designs over the last years. Usually formal verification has been in the role of supplementing more traditional coverage oriented testing activities. For the recent Intel(r) Core(tm) i7 design we took a step further and used formal verification as the primary validation vehicle for the core execution cluster, the component responsible for the functional behaviour of all microinstructions of the design.