Visible to the public Reconfigurable Dynamic Trusted Platform Module for Control Flow Checking

TitleReconfigurable Dynamic Trusted Platform Module for Control Flow Checking
Publication TypeConference Paper
Year of Publication2014
AuthorsDas, S., Wei Zhang, Yang Liu
Conference NameVLSI (ISVLSI), 2014 IEEE Computer Society Annual Symposium on
Date PublishedJuly
KeywordsBenchmark testing, buffer overflow, code reuse, Computer architecture, control flow checking, Dynamic TPM, dynamic TPM design, field programmable gate arrays, formal verification, FPGA, instruction set architecture, Pipelines, processor pipeline, Reconfigurable Architecture, reconfigurable dynamic trusted platform module, Runtime, runtime attacks, Runtime Security, security, security of data, Software, stack smashing, Trusted Computing

Trusted Platform Module (TPM) has gained its popularity in computing systems as a hardware security approach. TPM provides the boot time security by verifying the platform integrity including hardware and software. However, once the software is loaded, TPM can no longer protect the software execution. In this work, we propose a dynamic TPM design, which performs control flow checking to protect the program from runtime attacks. The control flow checker is integrated at the commit stage of the processor pipeline. The control flow of program is verified to defend the attacks such as stack smashing using buffer overflow and code reuse. We implement the proposed dynamic TPM design in FPGA to achieve high performance, low cost and flexibility for easy functionality upgrade based on FPGA. In our design, neither the source code nor the Instruction Set Architecture (ISA) needs to be changed. The benchmark simulations demonstrate less than 1% of performance penalty on the processor, and an effective software protection from the attacks.

Citation Key6903354