Visible to the public Hardware trojan detection by symmetry breaking in path delays

TitleHardware trojan detection by symmetry breaking in path delays
Publication TypeConference Paper
Year of Publication2014
AuthorsYoshimizu, N.
Conference NameHardware-Oriented Security and Trust (HOST), 2014 IEEE International Symposium on
Date PublishedMay
Keywordsbenchmark circuits, circuit symmetries, delays, detect modifications, electronic engineering computing, Hardware, hardware trojan, hardware Trojan detection, HT, IC, integrated circuits, inter-and intra-die variations, invasive software, Logic gates, path delay, path delays, Sensitivity, side channel methods, subcircuit consistencies, symmetric paths, symmetry breaking, Transistors, Trojan horses

This paper discusses the detection of hardware Trojans (HTs) by their breaking of symmetries within integrated circuits (ICs), as measured by path delays. Typically, path delay or side channel methods rely on comparisons to a golden, or trusted, sample. However, golden standards are affected by inter-and intra-die variations which limit the confidence in such comparisons. Symmetry is a way to detect modifications to an IC with increased confidence by confirming subcircuit consistencies within as it was originally designed. The difference in delays from a given path to a set of symmetric paths will be the same unless an inserted HT breaks symmetry. Symmetry can naturally exist in ICs or be artificially added. We describe methods to find and measure path delays against symmetric paths, as well as the advantages and disadvantages of this method. We discuss results of examples from benchmark circuits demonstrating the detection of hardware Trojans.

Citation Key6855579