Visible to the public Elliptic Curve Cryptography (2014 Year in Review), Part 2

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Elliptic Curve Cryptography
(2014 Year in Review) 
Part 2


Elliptic curve cryptography is a major research area globally.  In 2014, more than one hundred articles of interest to the Science of Security community have been published.  We cite them here in five parts.


Vincy, J.; Krithika, S.; Gowtham, K., "Design of Cryptosystem Based On ECC Algorithm Using Hexadecimal Values Of Character," Green Computing Communication and Electrical Engineering (ICGCCEE), 2014 International Conference on, pp.1,6, 6-8 March 2014. doi: 10.1109/ICGCCEE.2014.6922205 This paper proposes a new approach to encrypt data with new modified cryptosystem based on elliptic curve. This new version utilizes the original Menezes Vanstone cryptosystem. But it has some additional features to cryptosystem's encryption method. According to the encryption method, first the message is divided into blocks that contain only one character, and then each character is converted to hexadecimal value. A hexadecimal value of each character has two digits. These two digits allow us to express the message as a point in curve. The knowledge of each character's point need not be sent to the recipient. The paper explains the implementation of encrypting data with new modified cryptosystem based on elliptic curve using VHDL.
Keywords: public key cryptography; ECC algorithm; VHDL; cryptosystem; elliptic curve; hexadecimal values of character; Algorithm design and analysis; Ciphers; Elliptic curve cryptography ;Elliptic curves; Encryption; Cryptography; Elliptic curve cryptography; Menezes Vanstone cryptosystem; Symmetric key (ID#: 15-4203)


Young Sil Lee; Alasaarela, E.; HoonJae Lee, "Secure Key Management Scheme Based On ECC Algorithm For Patient's Medical Information In Healthcare System," Information Networking (ICOIN), 2014 International Conference on, pp.453,457, 10-12 Feb. 2014. doi: 10.1109/ICOIN.2014.6799723 Recent advances in Wireless Sensor Networks have given rise to many application areas in healthcare such as the new field of Wireless Body Area Networks. The health status of humans can be tracked and monitored using wearable and non-wearable sensor devices. Security in WBAN is very important to guarantee and protect the patient's personal sensitive data and establishing secure communications between BAN sensors and external users is key to addressing prevalent security and privacy concerns. In this paper, we propose secure and efficient key management scheme based on ECC algorithm to protect patient's medical information in healthcare system. Our scheme divided into three phases as setup, registration, verification and key exchange. And we use the identification code which is the SIM card number on a patient's smart phone with the private key generated by the legal use instead of the third party. Also to prevent the replay attack, we use counter number at every process of authenticated message exchange to resist.
Keywords: body area networks; health care; medical information systems; message authentication; public key cryptography; ECC algorithm; WBAN; authenticated message exchange; healthcare system; patient medical information protection; secure key management scheme; wireless body area networks; wireless sensor networks; Elliptic curve cryptography; Elliptic curves; Medical services; Sensors; Wireless sensor networks; Elliptic curve Cryptography; body area sensor network security; healthcare security; key management; secure communication (ID#: 15-4204)


Chiou-Yng Lee; Chun-Sheng Yang; Meher, B.K.; Meher, P.K.; Jeng-Shyang Pan, "Low-Complexity Digit-Serial and Scalable SPB/GPB Multipliers Over Large Binary Extension Fields Using (b,2)-Way Karatsuba Decomposition," Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 61, no.11, pp.3115, 3124, Nov. 2014. doi: 10.1109/TCSI.2014.2335031 Shifted polynomial basis (SPB) and generalized polynomial basis (GPB) are two variations of polynomial basis representation. SPB/GPB have potential for efficient bit-level and digit-level implementations of multiplication over binary extension fields. This paper presents a (b,2)-way KA decomposition for digit-serial multiplication with low-space complexity. Based on the proposed parallel (b,2)-way KA scheme, we derive a novel scalable SPB/GPB multiplier. Analytical results show that the proposed multiplier could achieve the desired trade-off between space and time complexities. Our proposed multiplier is modular, regular, and suitable for very-large-scale integration (VLSI) implementations. It involves significantly less area complexity, less computation time and less energy consumption compared to the existing digit-serial and scalable multipliers.
Keywords: VLSI; multiplying circuits; polynomials; public key cryptography;(b,2)-way Karatsuba decomposition; SPB-GPB multipliers; VLSI; binary extension fields; elliptic curve cryptography; generalized polynomial basis; low-complexity digit-serial multiplication; shifted polynomial basis; very large scale integration; Complexity theory; Computer architecture; Delays; Hardware; Logic gates; Polynomials; Pulse width modulation; Elliptic curve cryptography (ECC);Karatsuba algorithm; pairing computation; shifted polynomial basis (ID#: 15-4205)


Javeed, K.; Xiaojun Wang, "Radix-4 and radix-8 Booth Encoded Interleaved Modular Multipliers over General Fp," Field Programmable Logic and Applications (FPL), 2014 24th International Conference on, pp. 1, 6, 2-4 Sept. 2014. doi: 10.1109/FPL.2014.6927452 This paper presents radix-4 and radix-8 Booth encoded modular multipliers over general Fp based on inter-leaved multiplication algorithm. An existing bit serial interleaved multiplication algorithm is modified using radix-4, radix-8 and Booth recoding techniques. The modified radix-4 and radix-8 versions of interleaved multiplication result in 50% and 75% reduction in required number of clock cycles for one modular multiplication over the corresponding bit serial interleaved multipliers, while maintaining a competitive critical path delay. The proposed architectures are implemented in Verilog HDL and synthesized by targeting virtex-6 FPGA platform. Due to an efficient utilization of optimized addition chains available in FPGAs and exploiting the parallelism among operations, the proposed radix-4 and radix-8 multipliers compute one 256 × 256 bit modular multiplication in 1.49μs and 0.93μs respectively, which are 35% and 94% improvement over the corresponding bit serial version. Further, this work also presents a thorough comparison on basis of area, throughput, and area × time per bit value. Which shows that these designs are efficiently optimized for area × time per bit value with a high throughput rate. Thus, these designs are suitable to construct most of the elliptic curve and pairing based cryptographic processors.
Keywords: field programmable gate arrays; hardware description languages; multiplying circuits; public key cryptography; Verilog HDL;Virtex-6 FPGA platform; bit serial interleaved multiplication algorithm; booth recoding; critical path delay; elliptic curve cryptographic processors; pairing based cryptographic processors;radix-4 booth encoded interleaved modular multipliers;radix-8 booth encoded interleaved modular multipliers; Algorithm design and analysis; Clocks; Computer architecture; Field programmable gate arrays; Hardware; Registers; Throughput; Finite field; elliptic curve cryptography (ECC);interleaved multiplication; public key cryptography (PKC) (ID#: 15-4206)


Jeng-Shyang Pan; Azarderakhsh, R.; Kermani, M.M.; Chiou-Yng Lee; Wen-Yo Lee; Che Wun Chiou; Jim-Min Lin, "Low-Latency Digit-Serial Systolic Double Basis Multiplier over GF(2m)  Using Subquadratic Toeplitz Matrix-Vector Product Approach," Computers, IEEE Transactions on, vol. 63, no.5, pp.1169,1181, May 2014. doi: 10.1109/TC.2012.239 Recently in cryptography and security, the multipliers with subquadratic space complexity for trinomials and some specific pentanomials have been proposed. For such kind of multipliers, alternatively, we use double basis multiplication which combines the polynomial basis and the modified polynomial basis to develop a new efficient digit-serial systolic multiplier. The proposed multiplier depends on trinomials and almost equally space pentanomials (AESPs), and utilizes the subquadratic Toeplitz matrix-vector product scheme to derive a low-latency digit-serial systolic architecture. If the selected digit-size is d bits, the proposed digit-serial multiplier for both polynomials, i.e., trinomials and AESPs, requires the latency of 2⌈√{m/d⌉, while traditional ones take at least O(⌈m/d⌉) clock cycles. Analytical and application-specific integrated circuit (ASIC) synthesis results indicate that both the area and the time × area complexities of our proposed architecture are significantly lower than the existing digit-serial systolic multipliers.
Keywords: logic design; matrix multiplication; multiplying circuits; systolic arrays; AESP; ASIC synthesis; almost equally space pentanomial; application-specific integrated circuit; digit-serial systolic double basis multiplier over GF(2m);low-latency digit-serial systolic architecture; polynomial basis; subquadratic Toeplitz matrix-vector product approach; subquadratic space complexity; trinomials; Clocks; Complexity theory; Computer architecture; Educational institutions; Electronic mail; Polynomials; Vectors; Subquadratic Toeplitz matrix-vector product; digit-serial systolic multiplier; double basis; elliptic curve cryptography (ID#: 15-4207)


Ali Jatoi, P.; Chowdhry, B.S.; Memon, A.A.; Ullah, M.G., "Exchanging Information In Wireless Sensor Networks At Very Low Time Consumption Rate In An Efficient Hybrid Cryptographic Algorithm," Wireless Communications, Vehicular Technology, Information Theory and Aerospace & Electronic Systems (VITAE), 2014 4th International Conference on, pp.1,5, 11-14 May 2014. doi: 10.1109/VITAE.2014.6934429 Sensors are the tiny nodes which are used for getting information from any particular area for some particular situations. These are usually deployed in such places where existence of human may not be possible. These are very small electronic devices having very short amount of resources like memory, power as well as bandwidth. A number of nodes are deployed which are connected with each other and also connected with a base station. While deploying on particular place, there might occur two types of problems; nodes may be in excess or very far from each other. If the nodes are in majority, then the network may be inefficient due to interference and malicious access control collisions. Efficiency of network is the main issue to be resolved at priority bases. While transferring of information from node to node or from node to base station, the least time must be consumed. As much as the network will be efficient, the data will be received and sent easily from node to node or at sink. For making network reliable and secure, cryptographic techniques have been used. A hybrid algorithm has been suggested here using both symmetric and asymmetric cryptographic techniques. A message is divided into two parts containing Meta data and original data. Symmetric cryptography has been implemented on Meta data part while asymmetric cryptography has been applied for the original part of message. This approach will make our network more efficient as well as secure and reliable.
Keywords: cryptography; sensor placement; telecommunication network reliability; wireless sensor networks; base station; cryptographic technique; efficient hybrid cryptographic algorithm; information exchange; malicious access control collision; nodes deployment; radiofrequency interference; symmetric cryptography; very low time consumption rate; wireless sensor networks; Algorithm design and analysis; Encryption; Public key cryptography; Routing protocols; Wireless sensor networks; Asymmetric; Elliptic Curve Cryptography; Node; Public Key Cryptography; SPIN; Symmetric; Symmetric Key Cryptography; Wireless Sensor Network (ID#: 15-4208)


Venkatasubramani, V.R.; Ram Kumar, G.; Vignesh, K.; ManiRajan, G.; Rajaram, S., "Fast Computation Of Scalar Multiplication Over Binary Edwards Curve Processor Against Side Channel Attack," Electronics and Communication Systems (ICECS), 2014 International Conference on, pp. 1, 7, 13-14 Feb. 2014. doi: 10.1109/ECS.2014.6892615 Effective implementation of scalar multiplication is vital for Elliptic Curve Crypto-Processor over GF(2m). They have problems in terms of unifiedness and completeness that is overcome by the Edwards Curve. In this paper, the scalar multiplication is done using Non Adjacent Form Algorithm (NAF). We illustrate parallelization in group operation level by utilizing unified addition formulas computation for Binary Edwards Curve (BEC). This decreases the number of field arithmetic operations, specifically multiplications, in the critical path by using many multipliers simultaneously. Also there is significant reduction in number of clock cycles and register resource at the expense of area usage. We estimate the LUT complexity and tradeoffs between time-area of the proposed BEC processor on FPGA. The results prove that the proposed BEC processor has better time performance compared to existing techniques.
Keywords: field programmable gate arrays; public key cryptography; table lookup; BEC; FPGA; LUT complexity; NAF; binary Edwards curve processor; clock cycle; elliptic curve cryptoprocessor; field arithmetic operation; nonadjacent form algorithm; register resource; scalar multiplication computation; side channel attack; Application specific integrated circuits; Artificial intelligence; Cryptography; Field programmable gate arrays; Time-frequency analysis; Binary Edwards Curve (BEC);Elliptic Curve Cryptography (ECC); Non Adjacent Form Algorithm (NAF); Power Profile Analysis (ID#: 15-4209)


Doche, C.; Sutantyo, D., "New and Improved Methods to Analyze and Compute Double-Scalar Multiplications," Computers, IEEE Transactions on, vol. 63, no. 1, pp. 230, 242, Jan.  2014. doi: 10.1109/TC.2012.184 We address several algorithms to perform a double-scalar multiplication on an elliptic curve. All the methods investigated are related to the double-base number system (DBNS) and extend previous work of Doche et al. [25]. We refine and rigorously prove the complexity analysis of the joint binary-ternary (JBT) algorithm. Experiments are in line with the theory and show that the JBT requires approximately 6 percent less field multiplications than the standard joint sparse form (JSF) method to compute [n]P + [m]Q. We also introduce a randomized version of the JBT, called JBT-Rand, that gives total control of the number of triplings in the expansion that is produced. So it becomes possible with the JBT-Rand to adapt and tune the number of triplings to the coordinate system and bit length that are used, to further decrease the cost of a double-scalar multiplication. Then, we focus on Koblitz curves. For extension degrees enjoying an optimal normal basis of type II, we discuss a Joint τ-DBNS approach that reduces the number of field multiplications by at least 35 percent over the traditional τ-JSF. For other extension degrees represented in polynomial basis, the Joint τ-DBNS is still relevant provided that appropriate bases conversion methods are used. In this situation, tests show that the speedup over the τ-JSF is then larger than 20 percent. Finally, when the use of the τ-DBNS becomes unrealistic, for instance because of the lack of an efficient normal basis or the lack of memory to allow an efficient conversion, we adapt the joint binary-ternary algorithm to Koblitz curves giving rise to the Joint τ-τ method whose complexity is analyzed and proved. The Joint τ-τ induces a speedup of about 10 percent over the τ-JSF.
Keywords: linear algebra; public key cryptography; JBT-rand algorithm; Koblitz curves; complexity analysis; double-base number system; double-scalar multiplication; elliptic curve; joint τ-τ method; joint τ-DBNS approach; joint binary-ternary algorithm; polynomial basis; Algorithm design and analysis; Approximation algorithms; Cryptography; Elliptic curves; Equations; Interference; Joints; Elliptic curve cryptography; Koblitz curves; double-base number system; double-scalar multiplication; joint sparse form (ID#: 15-4210)


Abdallah, W.; Boudriga, N.; Daehee Kim; Sunshin An, "An Efficient And Scalable Key Management Mechanism For Wireless Sensor Networks," Advanced Communication Technology (ICACT), 2014 16th International Conference on, pp.687, 692, 16-19 Feb. 2014. doi: 10.1109/ICACT.2014.6779051 A major issue to secure wireless sensor networks is key distribution. Current key distribution schemes are not fully adapted to the tiny, low-cost, and fragile sensors with limited computation capability, reduced memory size, and battery-based power supply. This paper investigates the design of an efficient key distribution and management scheme for wireless sensor networks. The proposed scheme can ensure the generation and distribution of different encryption keys intended to secure individual and group communications. This is performed based on elliptic curve public key encryption using Diffie-Hellman like key exchange and secret sharing techniques that are applied at different levels of the network topology. This scheme is more efficient and less complex than existing approaches, due to the reduced communication and processing overheads required to accomplish key exchange. Furthermore, few keys with reduced sizes are managed in sensor nodes which optimize memory usage, and enhances scalability to large size networks.
Keywords: public key cryptography; telecommunication network management; telecommunication network topology; telecommunication security; wireless sensor networks; Diffie-Hellman like key exchange; battery-based power supply; elliptic curve public key encryption; encryption keys; group communications; key distribution schemes; large size networks; limited computation capability; network topology; processing overheads; reduced memory size; scalable key management mechanism; secret sharing techniques; secure wireless sensor networks; sensor nodes; Base stations; Elliptic curves; Public key; Sensors; Wireless sensor networks; Elliptic curve cryptography; Key management; Security; Wireless sensor networks (ID#: 15-4211)


Pontie, S.; Maistri, P.; Leveugle, R., "An Elliptic Curve Crypto-Processor Secured by Randomized Windows," Digital System Design (DSD), 2014 17th Euromicro Conference on, pp. 535, 542, 27-29 Aug. 2014. doi: 10.1109/DSD.2014.18  Embedded systems are increasingly providing secure functionalities, which often rely on some dedicated hardware for symmetric and public-key cryptography. When resources are limited, elliptic curve cryptography (ECC) may be chosen instead of the more widely known RSA, which needs much longer keys for the same security level. However, ECC may be vulnerable, as any other cryptographic implementation, to side channel analysis, which may reveal secret information by analyzing collateral sources of information, such as power consumption. Countermeasures must be thus adopted at the design level, in order to ensure robust and secure operation of the device. We propose here a new scalar multiplication algorithm on an elliptic curve, based on a novel randomized window method. This design is protected against side channel attacks (Timing, Simple and Differential Power Analysis) and it is implemented over prime fields, but it can be applied to binary fields as well. In order to evaluate this countermeasure, we provide its costs, and an estimation of the additional entropy added to the computation against side channels attacks.
Keywords: embedded systems; public key cryptography; ECC; differential power analysis attack; elliptic curve cryptography; elliptic curve cryptoprocessor; embedded systems; information sources; public-key cryptography; randomized window method; scalar multiplication algorithm; side channel analysis; side channel attacks; simple power analysis attack; symmetric cryptography; timing attack; Algorithm design and analysis; Coprocessors; Elliptic curve cryptography; Elliptic curves; Heuristic algorithms; Radiation detectors; elliptic curves; power analysis;scalar multiplication; side channel analysis (ID#: 15-4212)


Ravikumar, K.; Udhayakumar, A., "Secure Multiparty Electronic Payments Using ECC Algorithm: A Comparative Study," Computing and Communication Technologies (WCCCT), 2014 World Congress on, pp.132, 136, Feb. 27 2014-March 1 2014. doi: 10.1109/WCCCT.2014.31 This paper is an attempt at the detailed study of Cryptography algorithm. In resource constrained system, Elliptic Curve Cryptography is a promising alternative for public algorithms, because it provides similar level of security with proposed shorter keys than conventional integer based public key algorithm. ECC over binary field is taken up with special interest because the operation in binary filed operation, are thought to be more in space and efficient in time. However, ECC's software implementation, on binary field are slow, Specially on low end processors, which are used in small computing devices such as sensors node, mobile phone, etc. This proposed paper, studied the Cryptography algorithms and software implementation of ECC. Firstly, while implementing ECC with software, for example byte size may affect the choice of algorithm some architectural parameters has been examined. Also, identification of software for low-end processors has been done. In addition, the proposed paper has implemented ECC algorithm in Multiparty Electronic transaction.
Keywords: electronic commerce; public key cryptography; software architecture; transaction processing; ECC algorithm; ECC software implementation; architectural parameters; binary field; binary filed operation; byte size; cryptography algorithm; elliptic curve cryptography; low-end processors; multiparty electronic transaction; public algorithms; resource constrained system; secure multiparty electronic payments; software identification; Algorithm design and analysis; Elliptic curve cryptography; Elliptic curves; Program processors; Software algorithms; Cryptography; DES; DSA; ECC; Elliptic Curve; RSA (ID#: 15-4213)


Nagaraju, M.; Srinu, M.; Satish Kumar, B., "Efficient Design And FPGA Implementation Of ECPBSG Algorithm For A Secure Communication Applications," Electronics and Communication Systems (ICECS), 2014 International Conference on, pp. 1 , 6, 13-14 Feb. 2014. doi: 10.1109/ECS.2014.6892766 The main aim of this paper is to design hardware efficient secure communication system. To design a secure communication system of low hardware complexity, one method is to avoid redundancy in cryptography primitives. The method used for encryption can be either a stream cipher or block cipher. But the hardware complexity of a stream cipher is much less than that of a block ciphers. Hence in a secure communication system of low hardware complexity, stream cipher is a suitable method in order to reduce redundant hardware for the implementation of some other cryptographic service in time sharing way in the system. The key exchange and encryption are two sequential operations and a popular standard used for key exchange is Elliptic Curve (EC) based method. Most critical step in the design of stream cipher is the design of a Cryptographically Strong Pseudorandom Bit Sequence Generator (CSPBSG). This PBSG is implemented based on Elliptic Curve (EC). The main complex hardware block in Elliptic Curve Pseudorandom Bit Sequence Generator (ECPBSG) is EC point multiplication block. The computational complexity of the EC point multiplication is reduced by using normal basis representation for elements of GF (2m). The GF multiplier structure used in implementation of EC point multiplication is chosen such that the overall hardware complexity is low. It is possible to design secure stream ciphers based on EC point multiplication. Hence this paper completely concentrates on hardware efficiency, in the implementation of secure communication system.
Keywords: Galois fields; digital arithmetic; field programmable gate arrays; logic design; multiplying circuits; public key cryptography; ECPBSG algorithm; FPGA implementation; Galois field multiplier structure; block cipher; cryptographically strong pseudorandom bit sequence generator; cryptography primitive; elliptic curve based method; elliptic curve pseudorandom bit sequence generator; key exchange; low hardware complexity; point multiplication block; secure communication applications; sequential operation; stream cipher; Ciphers; Communication systems; Complexity theory; Elliptic curve cryptography; Generators; Hardware; CSPBSG; EC; ECC; ECPBSG; GF; Gibberish; RSA; WEP (ID#: 15-4214)


Kodali, R.K., "Implementation of ECC with hidden Generator Point in Wireless Sensor Networks," Communication Systems and Networks (COMSNETS), 2014 Sixth International Conference on, pp. 1, 4, 6-10 Jan. 2014. doi: 10.1109/COMSNETS.2014.6734924 With ever growing demand for Wireless Sensor Networks (WSNs) in military and commercial application areas, the urge for secure data exchange over the network is also on the increase. The standard cryptographic algorithms, such as the RSA can not address the security issue due to its computational complexity and the resource constrained nature of the constituent nodes. Another public key cryptographic (PKC) algorithm, Elliptic curve cryptography (ECC) has been emerging as a promising alternative to be used in WSN nodes, as it is capable of providing a similar security level using smaller key length compared to that of the RSA. As WSN nodes are deployed randomly over the field, these nodes are more vulnerable to the man-in-middle (MIM) attack. In traditional ECC algorithm, the Generator point is published along with other domain parameters. An intruder, launching MIM attack, could crack the public key, leading to a security breach in the network. This work proposes a technique for ECC with a hidden generator point in order to overcome the MIM attack. Three different algorithms based on distribution of points on the elliptic cure (EC), using a different generator point for each encrypted message and selecting different generator points for each session are discussed. A comparison based on the computational cost and security for three different techniques is also presented.
Keywords: computational complexity; electronic data interchange; message authentication; public key cryptography; telecommunication security; wireless sensor networks; ECC algorithm; MIM attack; PKC algorithm; RSA; WSN; commercial application; computational complexity; constituent node; elliptic curve cryptography; hidden generator point; man-in-middle attack; message encryption; military application; public key cryptography; resource constraint; secure data exchange ; security level; standard cryptographic algorithm; wireless sensor network; Communication system security; Elliptic curve cryptography; Generators; Protocols; Wireless communication; Wireless sensor networks; ECC ;MIM attack; generator point (ID#: 15-4215)


Vedhavathy, T.R.; Manikandan, M.S.K.; Indrajith, N., "Secure Incentive Mechanism For Multihop Wireless Networks," Electronics and Communication Systems (ICECS), 2014 International Conference on, pp.1,5, 13-14 Feb. 2014. doi: 10.1109/ECS.2014.6892649 In multi hop wireless networks, the mobile nodes perform routing to relay the packets of other nodes. But selfish nodes do not relay other nodes' packets to save their limited resources. It greatly affect the network throughput and performance. Credits are used to stimulate the selfish nodes' cooperation in incentive protocols. But the existing protocols use heavyweight public-key cryptographic operations for securing the payment. In this paper, we propose secure incentive mechanism that uses the Elliptic Curve Cryptography (ECC) and the hashing operations, so as to improve the network performance and throughput. The proposed technique reduces the overhead of the system which is less than that of the public-key based protocols.
Keywords: cryptographic protocols; mobile radio; packet radio networks; public key cryptography; relay networks (telecommunication);telecommunication network routing; telecommunication security; ECC; elliptic curve cryptography; hashing operations; incentive protocols; mobile nodes; multihop wireless networks; network performance improvement; network throughput improvement; packet relaying; packet routing; payment security; public-key based protocols; public-key cryptographic operations; secure incentive mechanism; selfish node cooperation; Elliptic curve cryptography; IEEE 802.11 Standards; Routing; Cooperation stimulation; Incentive mechanisms; security; selfish nodes (ID#: 15-4216)


Jheng-Hao Ye; Szu-Han Huang; Ming-Der Shieh, "An Efficient Countermeasure Against Power Attacks for ECC over GF(p)," Circuits and Systems (ISCAS), 2014 IEEE International Symposium on, pp. 814, 817, 1-5 June 2014. doi: 10.1109/ISCAS.2014.6865260 Power attacks are serious threats to cryptographic devices, and most countermeasures against power attacks result in a large time overhead for hardware implementation. This work presents an efficient countermeasure against power attacks for elliptic curve cryptography over GF(p). The proposed algorithm adopts the Montgomery ladder scalar multiplication algorithm as a basic framework to protect SPA. Then, a new scheme is presented to effectively manipulate the key so as to reduce the resulting time overhead for preventing differential power attack (DPA) and zero power attack (ZPA). Particularly, the base point blinding technique and half key splitting scheme are used to protect the upper and the lower halves of the key, respectively. Experimental results show the proposed countermeasure exhibit a time advantage over related works. Compared to other countermeasures against SPA, DPA, and ZPA, the proposed one can achieve up to 15% time improvement for accomplishing one 160-bit GF(p) scalar multiplication.
Keywords: matrix multiplication; public key cryptography; DPA; ECC;GF(p);Montgomery ladder scalar multiplication algorithm; ZPA; base point blinding technique; cryptographic devices; differential power attack prevention; elliptic curve cryptography; half key splitting scheme; resulting time overhead reduction; zero power attack prevention; Algorithm design and analysis; Elliptic curve cryptography; Elliptic curves; Hardware; Power demand; Resistance (ID#: 15-4217)


Iwasaki, A.; Dohi, K.; Shibata, Y.; Oguri, K.; Harasawa, R., "A Soft-Core Processor For Finite Field Arithmetic With A Variable Word Size Accelerator," Field Programmable Logic and Applications (FPL), 2014 24th International Conference on, pp. 1, 4, 2-4 Sept. 2014. doi: 10.1109/FPL.2014.6927388 This paper presents implementation and evaluation of an accelerator architecture for soft-cores to speed up reduction process for the arithmetic on GF(2m) used in Elliptic Curve Cryptography (ECC) systems. In this architecture, the word size of the accelerator can be customized when the architecture is configured on an FPGA. Focusing on the fact that the number of the reduction processing operations on GF(2m) is affected by the irreducible polynomial and the word size, we propose to employ an unconventional word size for the accelerator depending on a given irreducible polynomial and implement a MIPS-based soft-core processor coupled with a variable-word size accelerator. As a result of evaluation with several polynomials, it was shown that the performance improvement of up to 10.2 times was obtained compared to the 32-bit word size, even taking into account the maximum frequency degradation of 20.4% caused by changing the word size. The advantage of using unconventional word sizes was also shown, suggesting the promise of this approach for low-power ECC systems.
Keywords: digital arithmetic; field programmable gate arrays; low-power electronics; public key cryptography; FPGA; MIPS-based soft-core processor; accelerator architecture; elliptic curve cryptography systems; finite field arithmetic; irreducible polynomial; low-power ECC systems; reduction processing operations; variable word size accelerator; word length 32 bit; Clocks; Elliptic curve cryptography; Error correction codes; Field programmable gate arrays; Polynomials; Registers (ID#: 15-4218)


Mansour, I.; Chalhoub, G.; Lafourcade, P.; Delobel, F., "Secure Key Renewal And Revocation for Wireless Sensor Networks," Local Computer Networks (LCN), 2014 IEEE 39th Conference on, pp. 382, 385, 8-11 Sept. 2014. doi: 10.1109/LCN.2014.6925797 Once a secure mechanism for authenticated communication is deployed in a Wireless Sensor Network (WSN), several situations may arise: a node can leave the network, a new node can join the network, an intruder could try to join the network or capture a node. Therefore it is important to revoke and renew certain keys that are learned by a malicious node. We propose several secure WSN protocols for revocations and renewal of cryptographic keys in the network based on symmetric encryption and elliptic curve cryptography (ECC). For all our solutions, we provide a formal analysis of the security of our protocols using Scyther, an automatic verification tool for cryptographic protocols. All the proposed protocols are proven secure but have different security levels by using different types of keys. Finally we implemented all our protocols on real testbeds using TelosB motes and compared their efficiency.
Keywords: cryptographic protocols; public key cryptography; telecommunication security; wireless sensor networks; ECC; Scyther; TelosB motes; WSN protocols; authenticated communication; automatic verification tool; cryptographic keys; cryptographic protocols; elliptic curve cryptography; key renewal; key revocation; malicious node; symmetric encryption; wireless sensor networks; DH-HEMTs; Elliptic curve cryptography; Encryption; Protocols; Wireless sensor networks; Key Renewing; Key Revocation; Security; WSN (ID#: 15-4219)


Kodali, R.K.; Amanchi, C.N.; Kumar, S.; Boppana, L., "FPGA Implementation Of Itoh-Tsujii Inversion Algorithm," Recent Advances and Innovations in Engineering (ICRAIE), 2014, pp. 1 ,5, 9-11 May 2014. doi: 10.1109/ICRAIE.2014.6909308 Elliptic Curve Cryptography (ECC) has been gaining popularity due to its shorter key size requirements. It uses arithmetic operations including addition, subtraction, multiplication and inversion in finite fields. For an efficient implementation of ECC, it is very important to carry out these operations faster using lesser resources. The in version operation consumes most of the time and more resources. The Itoh-Tsujii algorithm can be used to carry out the computation of multiplicative inverse by making use of Brauer addition chains in less time. This work presents an FPGA implementation of the multiplicative inversion for the key lengths of 194-, 233-, and 384- bits. A resource comparison for these key lengths is also made. This work uses Sunar-Koc multiplier for the finite field, GF(2m) multiplication.
Keywords: field programmable gate arrays; matrix multiplication; public key cryptography; Brauer addition chains; ECC; FPGA;GF(2m) multiplication; Itoh-Tsujii inversion algorithm; Sunar-Koc multiplier; arithmetic operation; elliptic curve cryptography; multiplicative inverse; Elliptic curve cryptography; Equations;Field programmable gate arrays;E CC; inversion; multiplication (ID#: 15-4220)


Bigou, K.; Tisserand, A., "RNS Modular Multiplication Through Reduced Base Extensions," Application-specific Systems, Architectures and Processors (ASAP), 2014 IEEE 25th International Conference on, pp.57,62, 18-20 June 2014. doi: 10.1109/ASAP.2014.6868631 The paper describes a new RNS (residue number system) modular multiplication algorithm, for finite field arithmetic over FP, based on a reduced number of moduli in base extensions with only 3n=2 moduli instead of 2n for standard ones. Our algorithm reduces both the number of elementary modular multiplications (EMMs) and the number of stored precomputations for large asymmetric cryptographic applications such as elliptic curve cryptography or Diffie-Hellman (DH) cryptosystem. It leads to faster operations and smaller circuits.
Keywords: cryptography; residue number systems; DH cryptosystem; Diffie-Hellman cryptosystem; EMM;RNS modular multiplication algorithm; asymmetric cryptographic applications; base extensions; elementary modular multiplications; elliptic curve cryptography; finite field arithmetic; reduced base extensions; residue number system; Application specific integrated circuits; Barium; Elliptic curve cryptography; Graphics processing units; Memory; Standard (ID#: 15-4221)


Duc-Phong Le; Chik How Tan, "Improved Miller’s Algorithm for Computing Pairings on Edwards Curves," Computers, IEEE Transactions on, vol. 63, no.10, pp. 2626, 2632, Oct. 2014. doi: 10.1109/TC.2013.125 Since Edwards curves were introduced to elliptic curve cryptography by Bernstein and Lange in 2007, they have received a lot of attention due to their very fast group law operation. Pairing computation on such curves is slightly slower than on Weierstrass curves. However, in some pairing-based cryptosystems, they might require a number of scalar multiplications which is time-consuming operation and this can be advantageous to use Edwards in this scenario. In this paper, we present a variant of Miller's algorithm for pairing computation on Edwards curves. Our approach is generic, it is able to compute both Weil and Tate pairings on pairing-friendly Edwards curves of any embedding degree. Our analysis shows that the new algorithm is faster than the previous algorithms for odd embedding degree and as fast as for even embedding degree. Hence, the new algorithm is suitable for computing optimal pairings and in situations where the denominators elimination technique is not possible.
Keywords: public key cryptography; Edwards curves; Miller algorithm; Tate pairings; Weierstrass curve; Weil pairings; curve pairing computation; elliptic curve cryptography; embedding degree; group law operation; pairing-based cryptosystems; scalar multiplications; Algorithm design and analysis; Cryptographic protocols; Elliptic curve cryptography; Elliptic curves; Equations; Edwards curves; Miller’s algorithm; Weil/Tate pairings; pairing computation; pairing-based cryptography; pairing-friendly elliptic curves (ID#: 15-4222)


Cinnati Loi, K.C.; Sen An; Seok-Bum Ko, "FPGA Implementation Of Low Latency Scalable Elliptic Curve Cryptosystem Processor in GF(2m)," Circuits and Systems (ISCAS), 2014 IEEE International Symposium on, pp.822,825, 1-5 June 2014. doi: 10.1109/ISCAS.2014.6865262 This paper presents the architecture of a scalable elliptic curve cryptography (ECC) processor (ECP). Two versions of scalable ECPs are presented, one for binary field pseudo-random curves and one for binary field Koblitz curves. The implementations of these designs are able to support all 5 key sizes of pseudo-random or Koblitz curves recommended by the National Institute of Standards and Technology (NIST) without reconfiguring the hardware. The paper proposes an architecture of a finite field multiplier that uses the Karatsuba-Ofman algorithm in order to reduce the latency of the finite field multiplication for larger key sizes. As a result, the latency of the overall elliptic curve point multiplication (ECPM) is reduced compared to previous designs of the scalable ECPs. To the authors' best knowledge, the proposed scalable ECPs are the fastest ECPs that can support all 5 pseudo-random or Koblitz curves recommended by NIST.
Keywords: Galois fields; digital arithmetic; field programmable gate arrays; multiplying circuits; public key cryptography; ECC ECP; ECPM;FPGA;GF(2m); Karatsuba-Ofman algorithm; binary field Koblitz curves; binary field pseudorandom curves; elliptic curve point multiplication ;finite field multiplier architecture; low latency scalable elliptic curve cryptosystem processor; Algorithm design and analysis; Elliptic curve cryptography; Elliptic curves; Hardware; NIST; Registers (ID#: 15-4223)


Fan, Xin; Peter, Steffen; Krstic, Milos, "GALS Design of ECC against Side-Channel Attacks — A Comparative Study," Power and Timing Modeling, Optimization and Simulation (PATMOS), 2014 24th International Workshop on, pp.1, 6, Sept. 29 2014-Oct. 1 2014. doi: 10.1109/PATMOS.2014.6951905 Elliptic Curve Cryptography (ECC) represents the state-of-the-art of public-key cryptography. It is very computation intensive and hardware consuming for ASIC implementation. In this work, an ECC processor based on the Globally Asynchronous Locally Synchronous (GALS) design is presented. Attention has been paid on the resistances of GALS design against side-channel attacks (SCAs). The pausible clocking scheme, with random hopping of clock frequencies, is applied as a countermeasure of SCAs with low overhead on hardware. A comparative study between the synchronous and the GALS designs of ECC, in terms of the SCA resistance, processing efficiency, and hardware costs, is further elaborated.
Keywords: Clocks; Delays; Elliptic curve cryptography; Hardware; Synchronization; ECC; GALS; SCA (ID#: 15-4224)


Lu, Yung-Feng; Shu, I-Chih; Tseng, Hsueh-Wen; Chou, Shih-Chun, "An NFC-Phone Mutual Authentication Scheme For Smart-Living Applications," Information Science, Electronics and Electrical Engineering (ISEEE), 2014 International Conference on, vol.2, no., pp.1053,1057, 26-28 April 2014. doi: 10.1109/InfoSEEE.2014.6947830 This paper presents a two-factor authentication with key agreement scheme for smart living applications. The proposed mechanism integrates IMSI identifier and identity-based remote mutual authentication scheme on elliptic curve cryptography (ECC). It supports flawless two-factor and mutual authentication of participants and agreement of session key. The proposed mechanism does not require modifying the software of clients; thus, it is highly flexibly. We believe the proposed mechanism is usable for smart living applications.
Keywords: Authentication; Elliptic curve cryptography; Elliptic curves; Mobile handsets; Servers; ECC; key agreement; smart living; two-factor authentication (ID#: 15-4225)


He, D.; Wang, D., "Robust Biometrics-Based Authentication Scheme for Multiserver Environment," Systems Journal, IEEE, vol.  PP, no. 99, pp. 1, 8, 06 February 2014. doi: 10.1109/JSYST.2014.2301517 The authentication scheme is an important cryptographic mechanism, through which two communication parties could authenticate each other in the open network environment. To satisfy the requirement of practical applications, many authentication schemes using passwords and smart cards have been proposed. However, passwords might be divulged or forgotten, and smart cards might be shared, lost, or stolen. In contrast, biometric methods, such as fingerprints or iris scans, have no such drawbacks. Therefore, biometrics-based authentication schemes gain wide attention. In this paper, we propose a biometrics-based authentication scheme for multiserver environment using elliptic curve cryptography. To the best of our knowledge, the proposed scheme is the first truly three-factor authenticated scheme for multiserver environment. We also demonstrate the completeness of the proposed scheme using the Burrows–Abadi–Needham logic.
Keywords: Authentication; Elliptic curve cryptography; Feature extraction; Servers; Smart cards; Authentication scheme; biometrics; elliptical curve cryptosystem; smart card (ID#: 15-4226)


Oder, T.; Poppelmann, T.; Güneysu, T., "Beyond ECDSA and RSA: Lattice-Based Digital Signatures On Constrained Devices," Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE, pp.1,6, 1-5 June 2014.  All currently deployed asymmetric cryptography is broken with the advent of powerful quantum computers. We thus have to consider alternative solutions for systems with long-term security requirements (e.g., for long-lasting vehicular and avionic communication infrastructures). In this work we present an efficient implementation of BLISS, a recently proposed, post-quantum secure, and formally analyzed novel lattice-based signature scheme. We show that we can achieve a significant performance of 35.3 and 6 ms for signing and verification, respectively, at a 128-bit security level on an ARM Cortex-M4F microcontroller. This shows that lattice-based cryptography can be efficiently deployed on today's hardware and provides security solutions for many use cases that can even withstand future threats.
Keywords: digital signatures; microcontrollers; public key cryptography; quantum computing; ARM Cortex-M4F microcontroller; BLISS; ECDSA; RSA; asymmetric cryptography; constrained devices; elliptic curve cryptography; lattice based cryptography; lattice based digital signatures; quantum computers; word length 128 bit; Elliptic curve cryptography; Memory management; Microcontrollers; Polynomials; Random access memory (ID#: 15-4227)



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