Visible to the public Enhancing Hardware Security with Emerging Transistor Technologies

TitleEnhancing Hardware Security with Emerging Transistor Technologies
Publication TypeConference Paper
Year of Publication2016
AuthorsBi, Yu, Hu, X. Sharon, Jin, Yier, Niemier, Michael, Shamsi, Kaveh, Yin, Xunzhao
Conference NameProceedings of the 26th Edition on Great Lakes Symposium on VLSI
Conference LocationNew York, NY, USA
ISBN Number978-1-4503-4274-2
Keywordsemerging transistors, hardware security, i-o systems security, i/o systems security, IC camouflaging, io systems security, NCFET, polymorphic logic, pubcrawl, Scalability, symFET, TFET, tunnel transistor

We consider how the I-V characteristics of emerging transistors (particularly those sponsored by STARnet) might be employed to enhance hardware security. An emphasis of this work is to move beyond hardware implementations of physically unclonable functions (PUFs) and random num- ber generators (RNGs). We highlight how new devices (i) may enable more sophisticated logic obfuscation for IP protection, (ii) could help to prevent fault injection attacks, (iii) prevent differential power analysis in lightweight cryptographic systems, etc.

Citation Keybi_enhancing_2016