Visible to the public Biblio

Filters: Author is Vaillant, Victor  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
Vaillant, Victor, Rivet, Fran\c cois.  2017.  An Analog RF Fully Differential Common Mode Controlled Delay Line in 28Nm FDSOI Technology. Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands. :120–124.

This paper presents an integrated Analog Delay Line (ADL) for analog RF signal processing. The design is inspired by a Bucket Brigade Device (BBD) structure. It transfers charges from a sampled input signal stage after stage. It belongs to the Charge Coupled Devices (CCD). This ADL is fully differential with Common Mode (CM) control. The 28nm Fully Depleted Silicon on Insulator (FDSOI) Technology from ST Microelectronics is used for the design. Further results come from simulations using Spectre Cadence.