Visible to the public Hybrid silicon CMOS-carbon nanotube physically unclonable functions

TitleHybrid silicon CMOS-carbon nanotube physically unclonable functions
Publication TypeConference Paper
Year of Publication2017
AuthorsArmstrong, D., Nasri, B., Karri, R., Shahrjerdi, D.
Conference Name2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
Date Publishedoct
ISBN Number978-1-5386-3766-1
Keywordsanalog silicon circuit, carbon nanotube, carbon nanotubes, CMOS, CMOS analogue integrated circuits, composability, Computational modeling, Contact resistance, electronic devices, hybrid silicon CMOS-carbon nanotube, Metals, Metrics, Microelectronics Security, nanotube array, nanotube transistors, Physically unclonable, physically unclonable functions, pubcrawl, PUF, PUF circuit, resilience, Resiliency, security, security tokens, Silicon, Transistors

Physically unclonable functions (PUFs) are used to uniquely identify electronic devices. Here, we introduce a hybrid silicon CMOS-nanotube PUF circuit that uses the variations of nanotube transistors to generate a random response. An analog silicon circuit subsequently converts the nanotube response to zero or one bits. We fabricate an array of nanotube transistors to study and model their device variability. The behavior of the hybrid CMOS-nanotube PUF is then simulated. The parameters of the analog circuit are tuned to achieve the desired normalized Hamming inter-distance of 0.5. The co-design of the nanotube array and the silicon CMOS is an attractive feature for increasing the immunity of the hybrid PUF against an unauthorized duplication. The heterogeneous integration of nanotubes with silicon CMOS offers a new strategy for realizing security tokens that are strong, low-cost, and reliable.

Citation Keyarmstrong_hybrid_2017