Visible to the public Intel MPX Explained: A Cross-Layer Analysis of the Intel MPX System Stack

TitleIntel MPX Explained: A Cross-Layer Analysis of the Intel MPX System Stack
Publication TypeConference Paper
Year of Publication2018
AuthorsOleksenko, Oleksii, Kuvaiskii, Dmitrii, Bhatotia, Pramod, Felber, Pascal, Fetzer, Christof
Conference NameAbstracts of the 2018 ACM International Conference on Measurement and Modeling of Computer Systems
ISBN Number978-1-4503-5846-0
Keywordscomposability, Cross Layer Security, intel mpx, isa extensions, memory safety, pubcrawl, resilience, Resiliency

Memory-safety violations are the primary cause of security and reliability issues in software systems written in unsafe languages. Given the limited adoption of decades-long research in software-based memory safety approaches, as an alternative, Intel released Memory Protection Extensions (MPX)--a hardware-assisted technique to achieve memory safety. In this work, we perform an exhaustive study of Intel MPX architecture along three dimensions: (a) performance overheads, (b) security guarantees, and (c) usability issues. We present the first detailed root cause analysis of problems in the Intel MPX architecture through a cross-layer dissection of the entire system stack, involving the hardware, operating system, compilers, and applications. To put our findings into perspective, we also present an in-depth comparison of Intel MPX with three prominent types of software-based memory safety approaches. Lastly, based on our investigation, we propose directions for potential changes to the Intel MPX architecture to aid the design space exploration of future hardware extensions for memory safety. A complete version of this work appears in the 2018 proceedings of the ACM on Measurement and Analysis of Computing Systems.

Citation Keyoleksenko_intel_2018