Visible to the public Realization of System Verification Platform of IoT Smart Node Chip

TitleRealization of System Verification Platform of IoT Smart Node Chip
Publication TypeConference Paper
Year of Publication2018
AuthorsLuo, Qiming, Lv, Ang, Hou, Ligang, Wang, Zhongchao
Conference Name2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)
ISBN Number978-1-5386-8311-8
Keywordsautomobiles, chip design cycle, Collaboration, composability, compositionality, design cost reduction, efficient verification platform, field programmable gate arrays, formal verification, FPGA, FPGA-based prototype verification, Internet of Things, IoT node, IoT smart node chip, large scale integrated circuits, policy-based governance, privacy, protocol verification, Protocols, Prototypes, pubcrawl, simulation verification, system verification, system verification platform, Systems Simulation, transmission protocol, Wireless fidelity

With the development of large scale integrated circuits, the functions of the IoT chips have been increasingly perfect. The verification work has become one of the most important aspects. On the one hand, an efficient verification platform can ensure the correctness of the design. On the other hand, it can shorten the chip design cycle and reduce the design cost. In this paper, based on a transmission protocol of the IoT node, we propose a verification method which combines simulation verification and FPGA-based prototype verification. We also constructed a system verification platform for the IoT smart node chip combining two kinds of verification above. We have simulated and verificatied the related functions of the node chip using this platform successfully. It has a great reference value.

Citation Keyluo_realization_2018