Visible to the public Test methodology for detecting short-channel faults in network on- chip networks using IOT

TitleTest methodology for detecting short-channel faults in network on- chip networks using IOT
Publication TypeConference Paper
Year of Publication2019
AuthorsKrishnamoorthy, Raja, Kalaivaani, P.T., Jackson, Beulah
Conference Name2019 3rd International conference on Electronics, Communication and Aerospace Technology (ICECA)
KeywordsAerospace electronics, Computer architecture, computing-intensive data processing, Conferences, cryptography, data encryption, data protection, Data security, Encoders/decoders, fault diagnosis, Integrated circuit interconnections, integrated circuit reliability, integrated circuit testing, interconnection networks, Internet of Things, IoT, Metrics, Monitoring, network on chip, network on chip security, network on- chip networks, network routing, network-on-chip, network-on-chip analysis machine, NoC, Power demand, resilience, Resiliency, routers networks, Routing, Scalability, short-channel fault detection
AbstractThe NOC Network on chip provides better performance and scalability communication structures point-to-point signal node, shared through bus architecture. Information analysis of method using the IOT termination, as the energy consumed in this regard reduces and reduces the network load but it also displays safety concerns because the valuation data is stored or transmitted to the network in various stages of the node. Using encryption to protect data on the area of network-on-chip Analysis Machine is a way to solve data security issues. We propose a Network on chip based on a combined multicore cluster with special packages for computing-intensive data processing and encryption functionality and support for software, in a tight power envelope for analyzing and coordinating integrated encryption. Programming for regular computing tasks is the challenge of efficient and secure data analysis for IOT end-end applications while providing full-functionality with high efficiency and low power to satisfy the needs of multiple processing applications. Applications provide a substantial parallel, so they can also use NOC's ability. Applications must compose in. This system controls the movement of the packets through the network. As network on chip (NOC) systems become more prevalent in the processing unit. Routers and interconnection networks are the main components of NOC. This system controls the movement of packets over the network. Chip (NOC) networks are very backward for the network processing unit. Guides and Link Networks are critical elements of the NOC. Therefore, these areas require less access and power consumption, so we can better understand environmental and energy transactions. In this manner, a low-area and efficient NOC framework were proposed by removing virtual channels.
Citation Keykrishnamoorthy_test_2019