Visible to the public SaTC: CORE: Small: Finding and Mitigating Side-channel Leakage in Embedded ArchitecturesConflict Detection Enabled

Project Details

Lead PI

Performance Period

Oct 01, 2019 - Sep 30, 2022


Virginia Polytechnic Institute and State University


National Science Foundation

Award Number

Electronic devices found in a smart home, automobile, airplane, medical, and industrial applications are becoming more capable of on-the-spot processing information with their own embedded processors. While embedded processors make life easier, they also open the door to theft or corruption of our sensitive data. Malign actors can monitor power or radiation signatures in and around a device, and discover its secrets using side-channel attacks. This research project will improve the embedded programmers' capability to write code with side-channel protection and provides tools to verify their code's side-channel resistance early in the design process.

The project will exploit the potential of bit-sliced code to achieve highly deterministic software execution on embedded platforms while facilitating automated insertion of countermeasures against side-channel attacks. This work will develop a process to reorder general-purpose code into bit-sliced form, where each bit of an instruction word is effectively processed independently. Next, Boolean countermeasures against power side-channel attacks will be inserted automatically into the code. Effectiveness of embedded countermeasures will be verified through a novel combination of side-channel leakage detection methodologies during simulation and target prototyping stages. Finally, a leakage mitigation algorithm will iteratively upgrade the bit-sliced code.

This research may lead to novel processor architectures and instruction sets for secure embedded applications, in an era where innate security is as important as performance and efficiency. The techniques will support existing processor architectures, and they are compatible with existing embedded design methodologies. Additionally, the methods will lead to the integration of side-channel aware design in the electronic design automation workflow, supporting the development of new and improved architectures. The results of this project will enhance graduate-level courses on cryptographic engineering and on hardware security. The project will also leverage industry collaborations to transfer results, and design tools.

The results of this project, including publications, code, and examples, will be hosted online at After the completion of the project, the website will remain online as a reference repository.