Visible to the public High Speed Parallel RC4 Key Searching Brute Force Attack Based on FPGA

TitleHigh Speed Parallel RC4 Key Searching Brute Force Attack Based on FPGA
Publication TypeConference Paper
Year of Publication2019
AuthorsMahmood, Riyadh Zaghlool, Fathil, Ahmed Fehr
Conference Name2019 International Conference on Advanced Science and Engineering (ICOASE)
Date PublishedApril 2019
ISBN Number978-1-5386-9343-8
Keywordsblock RAM, Brute force, brute force attacks, Ciphers, clock rate, Clocks, cryptography, Encryption, field programmable gate array, field programmable gate arrays, Force, forecast keying methods, FPGA, frequency 128 MHz, Hardware, High Speed Parallel RC4 Key Searching Brute Force Attack, human factors, key searching speed, key searching unit, main controller, on-chip BRAM, policy-based governance, process control, pubcrawl, random-access storage, RC4, RC4 algorithm, stream cipher, Xilinx XC3S1600E-4 FPGA device

A parallel brute force attack on RC4 algorithm based on FPGA (Field Programmable Gate Array) with an efficient style has been presented. The main idea of this design is to use number of forecast keying methods to reduce the overall clock pulses required depended to key searching operation by utilizes on-chip BRAMs (block RAMs) of FPGA for maximizing the total number of key searching unit with taking into account the highest clock rate. Depending on scheme, 32 key searching units and main controller will be used in one Xilinx XC3S1600E-4 FPGA device, all these units working in parallel and each unit will be searching in a specific range of keys, by comparing the current result with the well-known cipher text if its match the found flag signal will change from 0 to 1 and the main controller will receive this signal and stop the searching operation. This scheme operating at 128-MHz clock frequency and gives us key searching speed of 7.7 x 106 keys/sec. Testing all possible keys (40-bits length), requires only around 39.5h.

Citation Keymahmood_high_2019