SignalPortType (FCO)
- Abstract
Inheritance
Ancestors
Feature
Port
SignalPortType
Descendants
SignalPortType
BusPort
,
SignalPort
,
SoftwareCommunicationPort
InputSignalPort
,
OutputSignalPort
Remarks
Aspects
BehaviorModelsAspect:
ComponentType
,
FaultModeModel
,
ModelicaAggregateInterface
,
ModelicaModelType
,
SignalFlowModel
All:
AggregatePort
,
DesignContainer
,
DesignElement
,
TestBench
,
TestBenchType
,
Workflow
TBDriverMonitorAspect:
TestBench
TBRequirementsAspect:
TestBench
Containment
Parents:
AggregatePort
,
Component
,
ComponentAssembly
,
ComponentType
,
DesignContainer
,
DesignElement
,
TestComponent
Connections
From node:
InformationFlow
,
Signal2Metric
,
SignalPort2PPInput
To node:
InformationFlow
,
SignalDriverMap
Formal Specification
Structural Semantics:
CyPhyML.4ml
Ancestors
Descendants