SignalPortMap (Connection)

Remarks

Port Map for all Behavior Signal Ports to Component-level Signal Ports.

Aspects

BehaviorModelsAspect: ComponentType, FaultModeModel, ModelicaAggregateInterface, ModelicaModelType, SignalFlowModel
All: AggregatePort, DesignContainer, DesignElement, TestBench, TestBenchType, Workflow

Containment

Parents: Component, ComponentType, TestComponent

Formal Specification

Structural Semantics: CyPhyML.4ml
Annotated Specification: ModelicaMappingExplained.4ml