% Delivered to the Government in Accordance with Contract FA8650-10-C-7080
% 
%  (c) 2011 United Technologies Corp.
% Developed with the sponsorship of the Defense Advanced Research Projects Agency (DARPA).
%  
% Permission is hereby granted, free of charge, to any person obtaining a copy of this data, including any software or models in source or binary form, as well as any drawings, specifications, and documentation (collectively "the Data"), to deal in the Data without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Data, and to permit persons to whom the Data is furnished to do so, subject to the following conditions:
%  
% The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Data.
%  
% THE DATA IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS, SPONSORS, DEVELOPERS, CONTRIBUTORS, OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE DATA OR THE USE OR OTHER DEALINGS IN THE DATA.
% 

%clear all
%clc
close all


load('rcl_architectures.mat')
total_architectures = size(rcltopology,1);
unit='OMU'; % Units = ohms, mH, and uF
spec_sheet % Loads R, C, L, Vin values

% infeasible_list = [3 9 17 23 35 36 47 59 60 61 62 63 74 76 77 78 79 80 81 82 83 84 ...
%     85 86 87 ];

infeasible_list = [];

tf_arch = [];

for itmp = 1:total_architectures
    
    
    if ~ismember(itmp,infeasible_list)
        archi = rcltopology(itmp,:);
        
        % 	#Vin_		#R1_		#L_		#C_		#Vout_
        
        %    1     2     1     2     1     2     1     3     2     3
        
        rlc=[
            % [node1, node2, type, R, L, C, Nobr] for RLC branch or line branch
            archi(3) archi(4) 0 resistor 0 0
            archi(5) archi(6) 0 0 inductor 0
            archi(7) archi(8) 0 0 0 capacitor
            ];
        
        source=[
            % [ node1, node2, type, amp, phase, freq, model ]
            archi(1) archi(2)  0     Vin 0      0  %Voltage source
            ];
        
        switches=[];
        
        %     U_nx1_x2
        
        n1 = archi(9);
        n2 = archi(10);
        
        y_u = strcat('U_n',num2str(n1),'_',num2str(n2));
        y_type = 0; % 0 = voltage
        yout=char(y_u);
        
        fid=fopen('power_circ2ss.net','w');
        
        try 
        [A,B,C,D,states,x0,x0sw,rlsw,u,x,y,freq,Asw,Bsw,Csw,Dsw,Hlin]=  ...
            power_statespace(rlc,switches,source,[],yout,y_type,unit,[],[], ...
            [],0,fid);
        catch exception
            infeasible_list = [infeasible_list itmp];
        end
        
        fclose(fid);
    end

    [bi,ai] = ss2tf(A,B,C,D);
    
    g = tf(bi,ai);
    tf_arch{itmp} = g;
    
%     hold on
%     figure(itmp)
%     bode(g);
    
%     pause(.1)
    
    
end















