AIM 2017
Date: Sep 10, 2017 6:00 am – Sep 10, 2017 5:00 pm
Location: Portland, Oregon
First Workshop on Architectures for Intelligent Machines AIM 2017
September 10th 2017 | Portland, Oregon | http://aim2017.cse.psu.edu/
The First Workshop on Architectures for Intelligent Machine (AIM) http://aim2017.cse.psu.edu/ will be held at Portland Oregon on September 10th 2017. AIM2017 is co-located with PACT 2017. This workshop aims to bring computer architecture, Compiler, AI and machine learning/deep learning researchers as well as domain experts together, to produce research that target the confluence of these disciplines. This workshop targets the domain of parallel Architectures and compilers for AI and machine learning and deep learning while focusing on key software, system and accelerator innovations. It will be a venue for discussion and brainstorming on topics related to these areas.
- Novel CPU, GPU, FPGA and ASIC architectures for AI
- Compiler design for Artificial Intelligence and data science
- Evolution of demands of ML frameworks and workloads
- Low precision and/or Mixed precision arithmetic
- Memory and storage technologies for AI: 3DXpoint, HBM, Stacked DRAM, NVRAM etc.
- Neural network instructions and special purpose units
- AI Workload design and development for accelerators
- Methods for Hardware / Software Co-design with Intelligent machines
- End to end flow system optimizations
Submission Guidelines
All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript (not to exceed 6 pages of single spaced text in the ACM format, including figures and tables). Submissions should be in the PDF format. Templates for paper preparation can be found in ACM. Please follow this link to submit your paper.
Workshop Co-Chairs:
- Dr. Meenakshi Arunachalam, Principal Engineer, Intel, meena.arunachalam@intel.com
- Dr. Mahmut Kandemir, Professor, Penn State University, USA
Program Committee:
- Mohammad Arjomand, Georgia Tech, USA
- Meenakshi Arunachalam, Intel, USA
- Nachiappan Chidambaram N., Apple Inc., USA
- Myoungsoo Jung, Yonsei University, Korea
- Mahmut Taylan Kandemir, Penn State, USA
- Rahul Khanna, Intel, USA
- Hassnaa Moustafa, Intel, USA
- Ozcan Ozturk, Bilkent University, Turkey
- Gabriel Rodriguez, Universidade da Coruna, Spain
- Vikram Saletore, Intel, USA
- Web/Publicity Chair:
- Jagadish Kotra, Penn State University, USA
Submissions Chair:
- Xulong Tang, Penn State University, USA
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First Workshop on Architectures for Intelligent Machines AIM 2017
September 10th 2017 | Portland, Oregon | http://aim2017.cse.psu.edu/
The First Workshop on Architectures for Intelligent Machine (AIM) http://aim2017.cse.psu.edu/ will be held at Portland Oregon on September 10th 2017. AIM2017 is co-located with PACT 2017. This workshop aims to bring computer architecture, Compiler, AI and machine learning/deep learning researchers as well as domain experts together, to produce research that target the confluence of these disciplines. This workshop targets the domain of parallel Architectures and compilers for AI and machine learning and deep learning while focusing on key software, system and accelerator innovations. It will be a venue for discussion and brainstorming on topics related to these areas.
- Novel CPU, GPU, FPGA and ASIC architectures for AI
- Compiler design for Artificial Intelligence and data science
- Evolution of demands of ML frameworks and workloads
- Low precision and/or Mixed precision arithmetic
- Memory and storage technologies for AI: 3DXpoint, HBM, Stacked DRAM, NVRAM etc.
- Neural network instructions and special purpose units
- AI Workload design and development for accelerators
- Methods for Hardware / Software Co-design with Intelligent machines
- End to end flow system optimizations
Submission Guidelines
All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript (not to exceed 6 pages of single spaced text in the ACM format, including figures and tables). Submissions should be in the PDF format. Templates for paper preparation can be found in ACM. Please follow this link to submit your paper.
Workshop Co-Chairs:
- Dr. Meenakshi Arunachalam, Principal Engineer, Intel, meena.arunachalam@intel.com
- Dr. Mahmut Kandemir, Professor, Penn State University, USA
Program Committee:
- Mohammad Arjomand, Georgia Tech, USA
- Meenakshi Arunachalam, Intel, USA
- Nachiappan Chidambaram N., Apple Inc., USA
- Myoungsoo Jung, Yonsei University, Korea
- Mahmut Taylan Kandemir, Penn State, USA
- Rahul Khanna, Intel, USA
- Hassnaa Moustafa, Intel, USA
- Ozcan Ozturk, Bilkent University, Turkey
- Gabriel Rodriguez, Universidade da Coruna, Spain
- Vikram Saletore, Intel, USA
- Web/Publicity Chair:
- Jagadish Kotra, Penn State University, USA
Submissions Chair:
- Xulong Tang, Penn State University, USA