SCOPES 2018

Date: May 28, 2018 12:00 am – May 30, 2018 11:00 am
Location: St. Goar, Germany

21st International Workshop on Software and Compilers for Embedded Systems (SCOPES 2018)

A next edition of the workshop on Software and Compilers for Embedded Systems  (SCOPES) will be organized in 2017. The workshop will feature a combination of research papers and research presentations (details see below). The papers and presentation abstracts will also be published in the ACM digital library. The workshop is held in cooperation with ACM SIGBED and EDAA.


AIM AND SCOPE

The influence of embedded systems is constantly growing. Increasingly powerful and versatile devices are developed and put on the market at a fast pace. Their functionality and number of features is increasing, and so are the constraints on the systems concerning size, performance, energy dissipation and timing predictability. To meet all these constraints, multi-processor systems on a chip (MPSoCs) are becoming popular in embedded systems. In order to meet the performance and energy constraints of embedded applications, heterogeneous  architectures incorporating functional units optimized for specific functions  are commonly employed. This technological trend has dramatic consequences on the parallelization, mapping, compiler and design technology used to develop these  systems.

The SCOPES workshop focuses on the software generation process for modern  embedded systems. Topics of interest include all aspects of the compilation and mapping process of embedded single and multi-processor systems. This includes  (but is not limited to):

- models of computation and programming languages;
- performance analysis techniques for models of computation;
- automatic code parallelization techniques;
- mapping and scheduling techniques for embedded multi-processor systems;
- code generation techniques for embedded single- and multi-processor architectures;
- design-space exploration techniques for use in the HW/SW codesign process;
- techniques to exploit the dynamic behavior in embedded applications;
- interactions between operating systems and compilers;
- techniques for compiler aided profiling, measurement, debugging and validation of embedded software.

WORKSHOP STRUCTURE

The workshop structure (presentations followed by intensive discussions) allows for an interactive atmosphere in which industrial and academic representatives can exchange new ideas and trends in the area MPSoC mapping and code generation.

VENUE

The workshop will take place in the beautiful “Schloss Rheinfels” hotel at St. Goar, Germany. Schloss Rheinfels is a castle at one of the nicest places within the Rhine valley, itself a world heritage site. Among a set of hotels focusing on wellness, the hotel is voted yearly as being part of the top 3 conference hotels in Germany. There is a beautiful view from the hotel onto the river Rhine.

GENERAL CHAIR
Henk Corporaal, Eindhoven University of Technology, NL

PROGRAM CHAIR
Sander Stuijk, Eindhoven University of Technology, NL

PUBLICITY CHAIR
Peter Marwedel, Dortmund University of Technology, DE

PROGRAM COMMITTEE
Marco Bekooij, NXP Semiconductors, NL
Timothy Bourke, INRIA, FR
Biagio Cosenza, TU Berlin, DE
Nikil Dutt, University of Irvine, USA
Heiko Falk, TU Hamburg-Harburg, DE
Carlo Galuzzi, Maastricht University, NL
Andreas Gerstlauer, U Texas, USA
Soheil Ghiasi, UC Davis, USA
Armin Größlinger, University of Passau, DE
Jan Haase, Helmut-Schmidt-Universität, DE
Frank Hannig, University of Erlangen, DE
Christian Haubelt, University of Rostock, DE
Timothy Jones, University of Cambridge, UK
Ben Juurlink, TU Berlin, DE
Andreas Krall, TU Vienna, AT
Akash Kumar, TU Dresden, DE
Rainer Leupers, RWTH Aachen, DE
Jan van Lunteren, IBM, CH
Andrea Marongiu, University of Bologna, IT
Luis Miguel Pinho, Polytechnic Institute of Porto, PO
Anca Molnos, CEA-LETI, FR
Andy Pimentel, University of Amsterdam, NL
Marc Pouzet, Université Pierre et Marie Curie, FR
Ingo Sander, KTH, SE
Dimitrios Soudris, NTUA, GR
Todor Stefanov, Leiden University, NL
Jean-Pierre Talpin, INRIA, FR
Jürgen Teich, University of Erlangen, DE

  • CPS Technologies
  • Architectures
  • Embedded Software
  • Systems Engineering
  • Foundations
  • Architectures
  • Modeling
  • Validation and Verification
  • Workshop
  • 2018
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