RAW 2018
Date: May 21, 2018 9:00 am – May 22, 2018 8:00 pm
Location: Vancouver, British Columbia, Canada
URL: http://raw.necst.it/
The 25th Anniversary of Reconfigurable Architectures Workshop (RAW 2018)
The 25th Reconfigurable Architectures Workshop (RAW 2018) will be held in Vancouver, British Columbia CANADA in May 2018. RAW 2018 is associated with the 32nd Annual IEEE International Parallel & Distributed Processing Symposium (IEEE IPDPS 2018) and is sponsored by the IEEE Computer Society and the Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.
A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.
HOW TO CELEBRATE THE 25th ANNIVERSARY OF RAW
6 INVITED SPEAKERS
We will host a series of invited talks describing the history of this
field and future directions for reconfigurable computing, in alphabetical order:
- Kaveh Aasaraai, Hardware Engineer at Jump Trading LLC
- Juergen Becker, is professor at the Karlsruhe Institute of Technology and head of the ITIV institute
- Derek Chiou, Principal Hardware Architect at Microsoft and associate professor at the University of Texas at Austin
- Viktor K. Prasanna, Charles Lee Powell Chair in Engineering and Professor at the University of Southern California
- Wayne Luk, Full Professor of Computer Engineering at Imperial College London
- Markus Weimer, Leader of the lead ML algo development team at Microsoft
DESIGN CONTEST
We are also pleased to announce the first edition of the Floorplanning Design Contest. The registration to the contest is free, teams willing to
participate can simply apply online at: http://raw-floorplanning-contest.necst.it/
The winning team will be invited to publish either a short or full paper at RAW about the proposed floorplanning algorithm. The design contest will open on the 1st of February and will close on the 28th of February. At the end of the contest, the winning team will be announced.
TOPICS OF INTEREST
Architectures & CAD
Algorithmic Techniques and Mapping
- Emerging Technologies (optical models, 3D Interconnects, devices)
- Reconfigurable Accelerators
- Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
- FPGA-based MPSoC and Multicore
- Distributed Systems & Networks
- Wireless and Mobile Systems
- Critical issues (Security, Energy efficiency, Fault-Tolerance)
Hot Topics in Reconfigurable Computing
- Configurable Cloud
- Heterogeneous Computing in Data Centers
- Accelerating Data Center Workloads
- FPGA-based Deep Learning
- Accelerating Genomic Computations
- Acceleration of Data Analytics
- Reconfigurable Computing in the IoT era
- Organic Computing, Biology-Inspired Solutions
- Applications in Finance
Runtime & System Management
- Run-Time Reconfiguration Models and Architectures
- Autonomic computing systems
- Operating Systems and High-Level Synthesis
- High-Level Design Methods (Hardware/Software co-design, Compilers)
- System Support (Soft processor programming)
- Runtime Support
- Reconfiguration Techniques
- Simulations and Prototyping (performance analysis, verification tools)
ORGANIZERS
Workshop Chairs
- Dirk Stroobandt, Ghent University, Belgium
- Ken Eguro, Microsoft Research
Program Chairs
- Marco D. Santambrogio, Politecnico di Milano, Italy
- Diana Goehringer, TU Dresden, Germany
Steering Committee
- Juergen Becker, Karlsruhe Insttute of Technology, Germany
- Viktor K. Prasanna, University of Southern California, USA
- Ramachandran Vaidyanathan, Louisiana State University, USA
Steering Chair
- Viktor K. Prasanna, University of Southern California, USA
Publicity
- Brian Veale, IBM, USA
- Ivan Beretta, University of Westminster, UK
- Laura Nacci, Politecnico di Milano, Italy
Webmaster and submission Chair
- Marco Rabozzi, Politecnico di Milano, Italy
Submitted by Anonymous
on
The 25th Anniversary of Reconfigurable Architectures Workshop (RAW 2018)
The 25th Reconfigurable Architectures Workshop (RAW 2018) will be held in Vancouver, British Columbia CANADA in May 2018. RAW 2018 is associated with the 32nd Annual IEEE International Parallel & Distributed Processing Symposium (IEEE IPDPS 2018) and is sponsored by the IEEE Computer Society and the Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.
A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.
HOW TO CELEBRATE THE 25th ANNIVERSARY OF RAW
6 INVITED SPEAKERS
We will host a series of invited talks describing the history of this
field and future directions for reconfigurable computing, in alphabetical order:
- Kaveh Aasaraai, Hardware Engineer at Jump Trading LLC
- Juergen Becker, is professor at the Karlsruhe Institute of Technology and head of the ITIV institute
- Derek Chiou, Principal Hardware Architect at Microsoft and associate professor at the University of Texas at Austin
- Viktor K. Prasanna, Charles Lee Powell Chair in Engineering and Professor at the University of Southern California
- Wayne Luk, Full Professor of Computer Engineering at Imperial College London
- Markus Weimer, Leader of the lead ML algo development team at Microsoft
DESIGN CONTEST
We are also pleased to announce the first edition of the Floorplanning Design Contest. The registration to the contest is free, teams willing to
participate can simply apply online at: http://raw-floorplanning-contest.necst.it/
The winning team will be invited to publish either a short or full paper at RAW about the proposed floorplanning algorithm. The design contest will open on the 1st of February and will close on the 28th of February. At the end of the contest, the winning team will be announced.
TOPICS OF INTEREST
Architectures & CAD
Algorithmic Techniques and Mapping
- Emerging Technologies (optical models, 3D Interconnects, devices)
- Reconfigurable Accelerators
- Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
- FPGA-based MPSoC and Multicore
- Distributed Systems & Networks
- Wireless and Mobile Systems
- Critical issues (Security, Energy efficiency, Fault-Tolerance)
Hot Topics in Reconfigurable Computing
- Configurable Cloud
- Heterogeneous Computing in Data Centers
- Accelerating Data Center Workloads
- FPGA-based Deep Learning
- Accelerating Genomic Computations
- Acceleration of Data Analytics
- Reconfigurable Computing in the IoT era
- Organic Computing, Biology-Inspired Solutions
- Applications in Finance
Runtime & System Management
- Run-Time Reconfiguration Models and Architectures
- Autonomic computing systems
- Operating Systems and High-Level Synthesis
- High-Level Design Methods (Hardware/Software co-design, Compilers)
- System Support (Soft processor programming)
- Runtime Support
- Reconfiguration Techniques
- Simulations and Prototyping (performance analysis, verification tools)
ORGANIZERS
Workshop Chairs
- Dirk Stroobandt, Ghent University, Belgium
- Ken Eguro, Microsoft Research
Program Chairs
- Marco D. Santambrogio, Politecnico di Milano, Italy
- Diana Goehringer, TU Dresden, Germany
Steering Committee
- Juergen Becker, Karlsruhe Insttute of Technology, Germany
- Viktor K. Prasanna, University of Southern California, USA
- Ramachandran Vaidyanathan, Louisiana State University, USA
Steering Chair
- Viktor K. Prasanna, University of Southern California, USA
Publicity
- Brian Veale, IBM, USA
- Ivan Beretta, University of Westminster, UK
- Laura Nacci, Politecnico di Milano, Italy
Webmaster and submission Chair
- Marco Rabozzi, Politecnico di Milano, Italy