ISLPED 2018
Date: Jul 23, 2018 6:00 am – Jul 25, 2018 5:00 pm
Location: Bellevue, Washington
INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED 2018)
Pending sponsorship by the ACM Special Interest Group on Design Automation (SIGDA) and the IEEE Circuits and Systems Society (CASS).
The International Symposium on Low Power Electronics and Design (ISLPED) is the premier forum for presentation of innovative research in all aspects of low power electronics and design, ranging from process technologies and analog/digital circuits, simulation and synthesis tools, system-level design and optimization, to system software and applications. Specific topics include, but are not limited to, the following three main tracks and sub-areas:
1. Technology, Circuits, and Architecture
1.1. Technologies
- Low-power technologies for device, interconnect, logic, memory, 2.5/3D, cooling, harvesting, sensors, optical, printable, biomedical, battery, and alternative energy storage devices.
1.2. Circuits
- Low-power digital circuits for logic, memory, reliability, clocking, power gating, resiliency, near-threshold and sub- threshold, variability, and digital assist schemes; Low-power analog/mixed-signal circuits for wireless, RF, MEMS, AD/DA Converters, I/O, PLLs/DLLS, imaging, DC-DC converters, and analog assist schemes.
1.3. Logic and Architecture
- Low-power logic and microarchitecture for SoC designs, processor cores (compute, graphics and other special purpose cores), cache, memory, arithmetic/Signal processing, cryptography, variability, asynchronous design, and non-conventional computing.
2. CAD, Systems, and Software
2.1. CAD Tools and Methodologies
- CAD tools and methodologies for low-power and thermal- aware design addressing power estimation, optimization, reliability and variation impact on power, and power-down approaches at all levels of design abstraction: physical, circuit, gate, register transfer, behavior, and algorithm.
2.2. Systems and Platforms
- Low-power, power-aware, and thermal-aware system design including data-center power delivery and cooling, Platforms for SoCs, embedded systems, approximate and brain-inspired computing, the Internet-of-Things (IoT), wearable computing, body-area networks, wireless sensor networks, and system-level power implications due to reliability and variability.
2.3. Software and Applications
- Energy-efficient, energy-aware, and thermal-aware software and application design including scheduling and management, power optimizations through HW/SW interactions, and emerging software low-power applications.
3. Industrial Design Track
- ISLPED18 solicits papers for an 'Industrial Design' track to reinforce interaction between the academic research community and industry. Industrial Design track papers have the same submission deadline as regular papers and should focus on similar topics, but are expected to provide a complementary perspective to academic research by focusing on challenges, solutions, and lessons learnt while implementing industrial-scale designs. Industrial design papers that focus on any of the topics mentioned in the tracks above are welcome.
There will be several invited talks by industry and academic thought leaders on key issues in low power electronics and design. The Symposium may also include embedded tutorials to provide attendees with the necessary background to follow recent research results, as well as panel discussions on future directions in low power electronics and design. Proposals for invited talks, embedded tutorials, and panels should be sent by email to the ISLPED'18 Technical Program Co-Chairs, Saibal Mukhopadhyay (saibal@ece.gatech.edu) and Matthew Ziegler (zieglerm@us.ibm.com) by the deadline listed above.
Participants interested in exhibiting at the Symposium should contact the General Co-Chairs by May 1, 2018.
Organizing Committee and Symposium Officers:
General Co-Chairs
- Thomas Wenisch, UMichigan, twenisch@umich.edu
- Jaydeep Kulkarni, UT Austin, jaydeep@austin.utexas.edu
Program Co-Chairs
- Saibal Mukhopadhyay, Gatech, saibal@ece.gatech.edu
- Matthew Ziegler, IBM, zieglerm@us.ibm.com
Publicity Chair
- Jing Li, U Wisconsin jli@ece.wisc.edu
Web Chair
- Akshitha Sriraman, U Michigan, akshitha@umich.edu
Industry Liaison
- Jack Sampson, Penn State U. sampson@cse.psu.edu
Publication Chair
- Mike Laurenzano, Clinc, mike@clinc.com
Local Arrangement Chair
- Visvesh Sathe, U Washington sathe@uw.edu
Registration Chair
- TBD
Design Contest Co-Chairs
- Charles Augustine, Intel, charles.augustine@intel.com
- Yongpan Liu, Tsinghua U., yp-liu@vip.163.com
Submitted by Anonymous
on
INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED 2018)
Pending sponsorship by the ACM Special Interest Group on Design Automation (SIGDA) and the IEEE Circuits and Systems Society (CASS).
The International Symposium on Low Power Electronics and Design (ISLPED) is the premier forum for presentation of innovative research in all aspects of low power electronics and design, ranging from process technologies and analog/digital circuits, simulation and synthesis tools, system-level design and optimization, to system software and applications. Specific topics include, but are not limited to, the following three main tracks and sub-areas:
1. Technology, Circuits, and Architecture
1.1. Technologies
- Low-power technologies for device, interconnect, logic, memory, 2.5/3D, cooling, harvesting, sensors, optical, printable, biomedical, battery, and alternative energy storage devices.
1.2. Circuits
- Low-power digital circuits for logic, memory, reliability, clocking, power gating, resiliency, near-threshold and sub- threshold, variability, and digital assist schemes; Low-power analog/mixed-signal circuits for wireless, RF, MEMS, AD/DA Converters, I/O, PLLs/DLLS, imaging, DC-DC converters, and analog assist schemes.
1.3. Logic and Architecture
- Low-power logic and microarchitecture for SoC designs, processor cores (compute, graphics and other special purpose cores), cache, memory, arithmetic/Signal processing, cryptography, variability, asynchronous design, and non-conventional computing.
2. CAD, Systems, and Software
2.1. CAD Tools and Methodologies
- CAD tools and methodologies for low-power and thermal- aware design addressing power estimation, optimization, reliability and variation impact on power, and power-down approaches at all levels of design abstraction: physical, circuit, gate, register transfer, behavior, and algorithm.
2.2. Systems and Platforms
- Low-power, power-aware, and thermal-aware system design including data-center power delivery and cooling, Platforms for SoCs, embedded systems, approximate and brain-inspired computing, the Internet-of-Things (IoT), wearable computing, body-area networks, wireless sensor networks, and system-level power implications due to reliability and variability.
2.3. Software and Applications
- Energy-efficient, energy-aware, and thermal-aware software and application design including scheduling and management, power optimizations through HW/SW interactions, and emerging software low-power applications.
3. Industrial Design Track
- ISLPED18 solicits papers for an 'Industrial Design' track to reinforce interaction between the academic research community and industry. Industrial Design track papers have the same submission deadline as regular papers and should focus on similar topics, but are expected to provide a complementary perspective to academic research by focusing on challenges, solutions, and lessons learnt while implementing industrial-scale designs. Industrial design papers that focus on any of the topics mentioned in the tracks above are welcome.
There will be several invited talks by industry and academic thought leaders on key issues in low power electronics and design. The Symposium may also include embedded tutorials to provide attendees with the necessary background to follow recent research results, as well as panel discussions on future directions in low power electronics and design. Proposals for invited talks, embedded tutorials, and panels should be sent by email to the ISLPED'18 Technical Program Co-Chairs, Saibal Mukhopadhyay (saibal@ece.gatech.edu) and Matthew Ziegler (zieglerm@us.ibm.com) by the deadline listed above.
Participants interested in exhibiting at the Symposium should contact the General Co-Chairs by May 1, 2018.
Organizing Committee and Symposium Officers:
General Co-Chairs
- Thomas Wenisch, UMichigan, twenisch@umich.edu
- Jaydeep Kulkarni, UT Austin, jaydeep@austin.utexas.edu
Program Co-Chairs
- Saibal Mukhopadhyay, Gatech, saibal@ece.gatech.edu
- Matthew Ziegler, IBM, zieglerm@us.ibm.com
Publicity Chair
- Jing Li, U Wisconsin jli@ece.wisc.edu
Web Chair
- Akshitha Sriraman, U Michigan, akshitha@umich.edu
Industry Liaison
- Jack Sampson, Penn State U. sampson@cse.psu.edu
Publication Chair
- Mike Laurenzano, Clinc, mike@clinc.com
Local Arrangement Chair
- Visvesh Sathe, U Washington sathe@uw.edu
Registration Chair
- TBD
Design Contest Co-Chairs
- Charles Augustine, Intel, charles.augustine@intel.com
- Yongpan Liu, Tsinghua U., yp-liu@vip.163.com