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Brasser, Ferdinand, Davi, Lucas, Dhavlle, Abhijitt, Frassetto, Tommaso, Dinakarrao, Sai Manoj Pudukotai, Rafatirad, Setareh, Sadeghi, Ahmad-Reza, Sasan, Avesta, Sayadi, Hossein, Zeitouni, Shaza et al..  2018.  Advances and Throwbacks in Hardware-assisted Security: Special Session. Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems. :15:1–15:10.
Hardware security architectures and primitives are becoming increasingly important in practice providing trust anchors and trusted execution environment to protect modern software systems. Over the past two decades we have witnessed various hardware security solutions and trends from Trusted Platform Modules (TPM), performance counters for security, ARM's TrustZone, and Physically Unclonable Functions (PUFs), to very recent advances such as Intel's Software Guard Extension (SGX). Unfortunately, these solutions are rarely used by third party developers, make strong trust assumptions (including in manufacturers), are too expensive for small constrained devices, do not easily scale, or suffer from information leakage. Academic research has proposed a variety of solutions, in hardware security architectures, these advancements are rarely deployed in practice.
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Dessouky, Ghada, Frassetto, Tommaso, Jauernig, Patrick, Sadeghi, Ahmad-Reza, Stapf, Emmanuel.  2020.  With Great Complexity Comes Great Vulnerability: From Stand-Alone Fixes to Reconfigurable Security. IEEE Security Privacy. 18:57–66.
The increasing complexity of modern computing devices has rendered security architectures vulnerable to recent side-channel and transient-execution attacks. We discuss the most relevant defenses as well as their drawbacks and how to overcome them for next-generation secure processor design.
Conference Name: IEEE Security Privacy