WCET 2013
Date: Jul 08, 2013 5:00 pm – Jul 08, 2013 5:00 pm
Location: Paris, France
13th International Workshop on Worst-Case Execution Time Analysis
Paris, France, July 9, 2013
http://wcet2013.imag.fr
In conjunction with the
25th Euromicro International Conference on Real-Time Systems (ECRTS)
http://ecrts.eit.uni-kl.de/index.php?id=115
GOALS:
The goal of the workshop is to bring together people from academia, tool vendors and users in industry who are interested in all aspects of timing analysis for real-time systems. The workshop fosters a highly interactive format with ample time for in-depth discussions. It provides a relaxed forum to present and discuss new ideas, new research
directions, and to review current trends in this area. The presentations will be kept short to leave plenty of time for interaction of attendees.
TOPICS:
The workshop welcomes submissions that include any issue related to timing analysis, in particular:
- Case studies and industrial experience of WCET analysis,
- Novel approaches to WCET computation and strategies to reduce the analysis complexity, including time-predictable computer architectures and synergy with compilers,
- Advances in tools for WCET analysis,
- Capturing flow facts to feed flow analysis for WCET,
- Needs and constraints stemming from current and future industrial development process and schedule that timing analysis should best accommodate,
- WCET-related analyses of code generated from design models,
- Experience with the integration of WCET with schedulability analysis, as well as with the software and system development process,
- Methods and benchmarks for WCET analysis evaluation,
- WCET analysis in the academic curriculum.
WORKSHOP CHAIR:
Claire Maiza, Grenoble INP / Verimag, France
PROGRAM COMMITTEE:
Guillem Bernat, Rapita Systems Ltd, UK
Hugues Casse, IRIT - Université de Toulouse, France
Francisco Cazorla, Barcelona Supercomputing Center, Spain
Heiko Falk, Ulm University, Germany
Kevin Hammond, University of St Andrews, UK
Damien Hardy, University of Rennes 1 / IRISA, France
Chris Healy, Furman University, USA
Niklas Holsti, Tidorum Ltd, Finland
Björn Lisper, Mälardalen University, Sweden
Tulika Mitra, National University of Singapore, Singapore
Stefan Petters, CISTER/IPP Hurray, Porto, Portugal
Peter Puschner, Vienna University of Technology, Austria
Jan Reineke, Saarland University, Germany
Christine Rochange, IRIT - Université de Toulouse, France
Tullio Vardanega, University of Padova, Italy
STEERING COMMITTEE:
Guillem Bernat, Rapita Systems Ltd., UK
Jan Gustafsson, Mälardalen University, Sweden
Isabelle Puaut, University of Rennes 1 / IRISA, France
Peter Puschner, Vienna University of Technology, Austria
Submitted by Anonymous
on
13th International Workshop on Worst-Case Execution Time Analysis
Paris, France, July 9, 2013
http://wcet2013.imag.fr
In conjunction with the
25th Euromicro International Conference on Real-Time Systems (ECRTS)
http://ecrts.eit.uni-kl.de/index.php?id=115
GOALS:
The goal of the workshop is to bring together people from academia, tool vendors and users in industry who are interested in all aspects of timing analysis for real-time systems. The workshop fosters a highly interactive format with ample time for in-depth discussions. It provides a relaxed forum to present and discuss new ideas, new research
directions, and to review current trends in this area. The presentations will be kept short to leave plenty of time for interaction of attendees.
TOPICS:
The workshop welcomes submissions that include any issue related to timing analysis, in particular:
- Case studies and industrial experience of WCET analysis,
- Novel approaches to WCET computation and strategies to reduce the analysis complexity, including time-predictable computer architectures and synergy with compilers,
- Advances in tools for WCET analysis,
- Capturing flow facts to feed flow analysis for WCET,
- Needs and constraints stemming from current and future industrial development process and schedule that timing analysis should best accommodate,
- WCET-related analyses of code generated from design models,
- Experience with the integration of WCET with schedulability analysis, as well as with the software and system development process,
- Methods and benchmarks for WCET analysis evaluation,
- WCET analysis in the academic curriculum.
WORKSHOP CHAIR:
Claire Maiza, Grenoble INP / Verimag, France
PROGRAM COMMITTEE:
Guillem Bernat, Rapita Systems Ltd, UK
Hugues Casse, IRIT - Université de Toulouse, France
Francisco Cazorla, Barcelona Supercomputing Center, Spain
Heiko Falk, Ulm University, Germany
Kevin Hammond, University of St Andrews, UK
Damien Hardy, University of Rennes 1 / IRISA, France
Chris Healy, Furman University, USA
Niklas Holsti, Tidorum Ltd, Finland
Björn Lisper, Mälardalen University, Sweden
Tulika Mitra, National University of Singapore, Singapore
Stefan Petters, CISTER/IPP Hurray, Porto, Portugal
Peter Puschner, Vienna University of Technology, Austria
Jan Reineke, Saarland University, Germany
Christine Rochange, IRIT - Université de Toulouse, France
Tullio Vardanega, University of Padova, Italy
STEERING COMMITTEE:
Guillem Bernat, Rapita Systems Ltd., UK
Jan Gustafsson, Mälardalen University, Sweden
Isabelle Puaut, University of Rennes 1 / IRISA, France
Peter Puschner, Vienna University of Technology, Austria