SAMOS XXII

International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

SAMOS XXII will take place at the Doryssa Seaside Resort in Samos from July 3 till July 7. People attending the conference should refer to the COVID-19 guideline published by the Greek government in order to enter the country. For authors/presenters, who can still not travel due to covid regulations in their countries, the possibility to do an online/recorded presentation will be given. The organizing committee is closely monitoring the situation with the ongoing COVID-19 pandemic. Health and safety are a primary concern to us and no unnecessary risks will be imposed on authors.

SAMOS is a unique conference. It deals with embedded systems (sort of) but that is not what makes it different. It brings together every year researchers from both academia and industry on the quiet and inspiring northern mountainside of the Mediterranean island of Samos, which in itself is different. But more importantly, it really fosters collaboration rather than competition. Formal and intensive technical sessions are only held in the mornings. A lively panel or distinguished keynote speaker ends the formal part of the day, and leads nicely into the afternoons and evenings — reserved for informal discussions, good food, and the inviting Aegean Sea. The conference papers will be published by Springer’s Lecture Notes in Computer Science – LNCS and will be included in the DBLP Database, among other databases. Authors are invited to submit technical papers in accordance with the author’s instructions describing original work in either one of the Conference Tracks or one of the Special Sessions.

Authors of selected papers will be invited to submit an extended version of their work to contribute to a special issue of the International Journal of Parallel Programming (IJPP). This issue will accept papers from all the topics of the SAMOS conference. The length of the papers is limited to 16 pages in LNCS format (see submission guidelines). You can submit your paper here. Information about the conference hotel can be found here.

Conference Tracks

The SAMOS con­fer­ence seeks paper con­tri­bu­tions in two main areas:

The Ap­pli­ca­tions, Sys­tems, Ar­chi­tec­tures, and Proces­sors

This topic area fo­cuses on ad­vances in sys­tems ef­fi­ciency in var­i­ous do­mains. We seek orig­i­nal con­tri­bu­tions de­scrib­ing new ar­chi­tec­tural and micro ar­chi­tec­tural tech­niques aim­ing to im­prove per­for­mance (e.g. pro­cess­ing through­put or real-time la­tency), en­ergy and power ef­fi­ciency, re­li­a­bil­ity and de­pend­abil­ity of em­bed­ded sys­tems. We so­licit novel ar­chi­tec­tures and com­put­ing method­olo­gies and so­lu­tions for ac­cel­er­at­ing ap­pli­ca­tions in var­i­ous em­bed­ded do­mains such as next gen­er­a­tion life sci­ences and med­i­cine, next gen­er­a­tion au­to­mo­tive and avion­ics, next gen­er­a­tion (ma­chine) learn­ing sys­tems for sur­veil­lance and recog­ni­tion, im­mer­sive vir­tual re­al­ity. Top­ics of in­ter­est in­clude (but are not lim­ited to):

• Novel Ar­chi­tec­tures for Ac­cel­er­a­tors in High Per­for­mance Em­bed­ded Sys­tems;
• Ap­pli­ca­tion-spe­cific and Do­main-spe­cific Em­bed­ded Het­ero­ge­neous Mul­ti­core Sys­tems;
• Em­bed­ded Re­con­fig­urable Proces­sors;
• Soft­ware tools, Com­pi­la­tion tech­niques and op­ti­miza­tions, and Code gen­er­a­tion for Re­con­fig­urable Ar­chi­tec­tures;
• Ar­chi­tec­ture syn­the­sis from Func­tional Lan­guages De­scrip­tions;
• Vir­tu­al­iza­tion and En­ergy-aware Se­cure, Re­li­able, and High Avail­abil­ity Multi-core Ar­chi­tec­tures;
• Em­bed­ded Par­al­lel Sys­tems and Mul­ti­proces­sor Sys­tems-On-Chip;
• Ap­pli­ca­tion level Re­source Man­age­ment of Multi-core Ar­chi­tec­tures;
• Mem­ory  Sys­tems and Man­age­ment for big data;
• In-/near-mem­ory pro­cess­ing;
• Net­work-on-Chip, Soft­ware De­fined Net­work-on-Chips.

The Mod­el­ing, De­sign, and De­sign Space Ex­plo­ration

This topic area fo­cuses on all de­sign processes for em­bed­ded sys­tems rang­ing from sys­tem-level spec­i­fi­ca­tion, de­sign lan­guages, mod­el­ing and sim­u­la­tion, per­for­mance, power, re­li­a­bil­ity and ther­mal es­ti­ma­tion and analy­sis, hard­ware/soft­ware and sys­tem syn­the­sis, de­sign and de­sign space ex­plo­ration method­olo­gies down to hard­ware and soft­ware syn­the­sis and com­pi­la­tion strate­gies. Top­ics of in­ter­est in­clude (but are not lim­ited to):

• Hard­ware/Soft­ware and Al­go­rithm/Ar­chi­tec­ture Co-de­sign;
• De­sign Space Ex­plo­ration Strate­gies, Al­go­rithms and CAD Tools;
• Spec­i­fi­ca­tion Lan­guages and Mod­els;
• Sys­tem-Level De­sign, Sim­u­la­tion, and Ver­i­fi­ca­tion;
• Hard­ware, Soft­ware and Sys­tem Syn­the­sis Tech­niques and CAD Tools;
• MP-SoC and Plat­form Based De­sign Method­olo­gies;
• MP-SoC Pro­gram­ming, Com­pil­ers, Sim­u­la­tion and Map­ping Tech­nolo­gies;
• Pro­fil­ing, Mea­sure­ment and Analy­sis Tech­niques and CAD Tools;
• (De­sign for) Sys­tem Adap­tiv­ity;
• Test­ing and De­bug­ging.

Keynotes

• Yale Patt, Uni­ver­sity of Texas – Austin, United States
• John Gloss­ner, Op­ti­mum Semi­con­duc­tor Tech­nolo­gies Inc., USA