This NSF CPS CAREER project studies the hardware/software co-design of sub-millisecond machine learning control for high-rate dynamic systems with non-stationary inputs that change the system?s state (i.e., damage). Such systems include combustion processes in jet engines, vehicle structures during crashes, and active blast mitigation structures. The novelty of the approach taken in this project is to co-design the control systems with the computing hardware they will run on to constrain system latency to within 1 millisecond. The developed solutions will be able to learn a system?s dynamics at the data rates required by high-rate dynamic systems. Machine learning models will learn the dynamics of the non-linear system online, which will then be used to model the dynamics of the system to the appropriate prediction horizon. The project is developing an automated programming methodology that enables the deployment of these real-time controllers onto compact and power-efficient computing devices. It follows that this research will impact society and the mission of the NSF by enabling a better understanding of dynamic systems operating in high-rate environments while enabling intelligent decision-making capabilities at speeds never before reached. The project will leverage existing and valuable resources at the University of South Carolina to involve several high school and undergraduate students in the project; with emphasis on providing research experiences to underrepresented, first-generation, and low-income students. This project will also train Ph.D. students in real-time machine learning and control.

More specifically, this research is addressing the fundamental question of how programmable hardware can be used to enable machine learning and control for systems that demand ultra-low latency. This is being done by formulating a framework for real-time machine learning control that co-designs hardware and software and provides a path to deployment on field programmable gate arrays (FPGAs). The project is: 1) Training a novel long short-term memory (LSTM) model on-chip with a custom online trainer that maps sensor signal and actuator input for a high-rate system to system state in real-time. 2) Developing approaches to share FPGA signal processing and memory resource for the parallel utilization of multiple LSTM forward-pass cores while maintaining deterministic timing. 3) Studying trade-offs between accuracy, performance, and resource requirements for real-time machine learning control at the microsecond timescale. Validation of the developed approach is being performed using a hardware-in-the-loop testing methodology with fast-acting actuators to control the outer mold line of a structural panel in simulated hypersonic flight.