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Cyber-Physical Systems Virtual Organization
Fostering collaboration among CPS professionals in academia, government, and industry
CPS-VO
Hardware Security
biblio
Machine Learning Bluetooth Profile Operation Verification via Monitoring the Transmission Pattern
Submitted by
grigby1
on Fri, 09/04/2020 - 4:27pm
security
telecommunication security
pubcrawl
composability
Resiliency
resilience
Human behavior
machine learning
feature extraction
classifier
learning (artificial intelligence)
cyber physical systems
formal verification
Decision Tree
system-on-chip
telecommunication computing
Bluetooth
Blue-tooth
Bluetooth profile operation verification
Bluetooth SoC
Bluetooth System-on-Chip
communication complexity
custom low-frequency integrated circuit
electronic engineering computing
Hardware Security
hardware-software security
integrated circuit manufacture
k-nearest neighbor
license communication IC
low computational complexity
low-cost legacy technology
mobile radio
profile classification algorithm
radio frequency output power
RF envelope detector
RF output power
RF Power
signal classification
smart descriptive time-domain feature extraction
Supervisory Circuit
support vector machine
transmission pattern
Cyber Physical System
bluetooth security
biblio
Automated Synthesis of Differential Power Attack Resistant Integrated Circuits
Submitted by
aekwall
on Mon, 08/24/2020 - 12:41pm
private key cryptography
Resiliency
pubcrawl
composability
Cryptography
standards
tools
Libraries
Automated Response Actions
Logic gates
power consumption
Power demand
logic design
Hardware Security
Resistance
combinational circuits
Automated Synthesis
CMOS logic circuits
CMOS synthesis
combinational cells
cryptographic processors
cryptographic systems
differential circuit design
differential logic
Differential Power Analysis
differential power analysis attacks
differential power attack resistant integrated circuits
DPA attack resistance
DPA resistant cell designs
Dynamic Differential Logic
fully automated synthesis system DPA resistant integrated circuits
MDPL
multiplying circuits
RT level Verilog specifications
secret key information
Secure Differential Multiplexer Logic
sequential cells
sequential circuits
biblio
Impact Evaluation of Embedded Security Mechanisms on System Performance
Submitted by
aekwall
on Mon, 06/15/2020 - 10:55am
security of data
Monitoring
Access Control
performance evaluation
embedded systems
Resiliency
pubcrawl
composability
Metrics
Data protection
Analytical models
Mathematical model
data flows
Hardware Security
system security
System performance
embedded security mechanisms
general-purpose systems
impact evaluation
impact evaluation analytical model of reference monitor
reference monitor
reference monitor functional model
subject-object model
system protection
biblio
Securing a Wireless Network-on-Chip Against Jamming Based Denial-of-Service Attacks
Submitted by
aekwall
on Mon, 05/11/2020 - 11:09am
Scalability
telecommunication security
learning (artificial intelligence)
Resiliency
pubcrawl
wireless sensor networks
Wireless communication
Metrics
machine learning
telecommunication network routing
telecommunication computing
radio networks
system-on-chip
DoS
Hardware Security
error correction codes
radiofrequency interference
DoS attack
Jamming
denial-of-service attack
machine learning classifier
HT
network-on-chip
data transfer security threats
denial-of-service attacks
internal hardware Trojans
jamming attack
low-power transceivers
ML classifiers
network-on-chip communications
NoC switches
nonscalable multihop data transmission paths
On chip interconnect
On chip security
on-chip data transfer
on-chip wireless medium
persistent jamming attack
radio transceivers
radiofrequency interconnections
random burst error correction code
Switches
switching networks
WiNoC security
wired NoC architectures
wireless interconnection
Wireless NoC
wireless NoC architectures
network on chip security
biblio
Security Network On-Chip for Mitigating Side-Channel Attacks
Submitted by
aekwall
on Mon, 05/11/2020 - 11:08am
security of data
Scalability
learning (artificial intelligence)
Resiliency
pubcrawl
Metrics
machine learning
physical interaction
system-on-chip
system security
sensors
Attack detection
timing
Hardware Security
side-channel attacks
integrated circuit design
data analysis
malicious activity
integrated circuits
network-on-chip
active attack
advance invasive attacks
advance noninvasive attacks
advanced technology nodes
attack-specific countermeasures
compromised device
contemporary hardware threats
design complexity
electromagnetic analysis attacks
electromagnetic interference
hardware security threats
high-confidence security network on-chip
individual threats
machine learning security IC
malicious physical interference
modern ICs
multiple countermeasures
on-chip distribution networks
On-chip power delivery
on-chip voltage variations
operating device-under-attack
robust confidence security network on-chip
security networks
Side-channel attack
side-channel attack mitigation
strict performance requirements
trained ML ICs
network on chip security
biblio
A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms
Submitted by
grigby1
on Fri, 04/03/2020 - 12:56pm
Logic gates
Cryptography
encryption
pubcrawl
Resiliency
Hardware
Hardware Security
industrial property
integrated circuits
Computer crime
invasive software
Metrics
Compositionality
provable security
resilience
Boolean satisfiability attack
computability
Hardware Trojans
integrated circuit supply chain
intellectual property piracy
logic encryption
logic encryption techniques
low-cost countermeasures
modern logic encryption algorithms
paradigm shift
SAT attack
structural corruption
biblio
Statistical Power Analysis for IoT Device Oriented Encryption with Glitch Canceller
Submitted by
grigby1
on Mon, 03/02/2020 - 1:33pm
Big Data
Cryptography
field programmable gate arrays
field-programmable gate array
glitch canceller
Hardware Security
Human behavior
Human Factors
Internet of Things
IoT device oriented encryption
IoT devise
Low-Power
lowest latency cryptography
Metrics
power consumption
PRINCE
privacy
pubcrawl
Scalability
Side-channel attack
statistical analysis
statistical power analysis
Tamper resistance
biblio
Countermeasure of Lightweight Physical Unclonable Function Against Side-Channel Attack
Submitted by
grigby1
on Mon, 03/02/2020 - 1:32pm
authentication
countermeasure method
Cryptography
external Internet
field programmable gate arrays
Hardware Security
Human behavior
Human Factors
Industrial Internet of Things
Integrated circuit modeling
internet
Internet of Things
lightweight physical unclonable function
lightweight PUF
message authentication
Metrics
modeling attack
Physical Unclonable Function
power aware computing
power consumption
Power demand
Power measurement
pubcrawl
Scalability
security of IoT
Side-channel attack
side-channel information
Tamper resistance
Training data
biblio
Enabling Ubiquitous Hardware Security via Energy-Efficient Primitives and Systems : (Invited Paper)
Submitted by
aekwall
on Mon, 03/02/2020 - 12:30pm
security
Scalability
Cryptography
Hardware
attack surface
power aware computing
Resiliency
pubcrawl
Metrics
design requirements
attacks
Entropy
Random access memory
Human Factors
Hardware Security
error correction codes
ubiquitous computing
energy-efficient primitives
HW security
Low power
low-end devices
power penalty
pufs
random number generators
security-sensitive applications
Thermal stability
ubiquitous hardware security
Ubiquitous Computing Security
biblio
Increasing the SAT Attack Resiliency of In-Cone Logic Locking
Submitted by
grigby1
on Wed, 02/26/2020 - 4:48pm
provable security
circuit netlist
Electronics packaging
Hardware
Hardware Security
in-cone logic locking
in-cone techniques
integrated circuits
integrated logic circuits
Iterative methods
key gate selection
logic design
Logic gates
logic locking
manufacturing
maximum fanout free cones
MFFC based algorithm
pubcrawl
removal attack
resilience
Resiliency
SAT attack
SAT attack resiliency
satisfiability attack
security
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