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Cyber-Physical Systems Virtual Organization
Fostering collaboration among CPS professionals in academia, government, and industry
CPS-VO
system-on-chip
biblio
Secure acceleration on cloud-based FPGAs – FPGA enclaves
Submitted by grigby1 on Tue, 06/01/2021 - 2:44pm
encryption
security
pubcrawl
Metrics
resilience
Resiliency
field programmable gate arrays
FPGA
Hardware
system-on-chip
Cloud Security
Computational modeling
composability
Concurrency
Hardware Security
Confidential computing
enclaves
FAA
biblio
On-Chip Randomization for Memory Protection Against Hardware Supply Chain Attacks to DRAM
Submitted by grigby1 on Wed, 04/28/2021 - 11:04am
circuit simulation
Cold Boot Attack
Cryptography
DRAM
Hardware
Memory Protection
pubcrawl
Random access memory
resilience
Resiliency
Rowhammer attack
Scalability
Security by Default
Software
supply chain protection
supply chains
system-on-chip
biblio
A Formal Model for the Automatic Configuration of Access Protection Units in MPSoC-Based Embedded Systems
Submitted by grigby1 on Mon, 03/29/2021 - 11:56am
abstract permission declarations
access permissions
access protection
access protection unit
authorisation
Code Generation
composability
configuration code
Data protection
dedicated access protection units
embedded systems
formal model
Hardware
heterogeneous system-on-chip platforms
information flow requirements
information flow tracking
internal communication links
Metrics
model-based design
MPSoC-based embedded systems
multiple processing cores
multiprocessing systems
multiprocessor system-on-chip
on-chip isolation
pubcrawl
real-time systems
resilience
Resiliency
Safety
safety-critical embedded system
safety-critical software
security
security-critical embedded system
system-level isolation
system-on-chip
timing
biblio
MiteS: Software-based Microarchitectural Attacks and Countermeasures in networked AP SoC Platforms
Submitted by grigby1 on Mon, 03/15/2021 - 1:08pm
adapted words addition
all-programmable system-on-chip
AP SoC attacker
AP SoC victim
buffer overflow
Buffer overflow attack
command injection attacks
command-injection
command-injection-based attack
composability
Computer crime
Cryptography
dynamic reconfiguration
field programmable gate arrays
FPGA dynamic configuration
Intellectual Property cores
internet
Internet Protocol
internetworked all programmable system-on-chip platforms
IP
Metrics
microarchitectural attack
microarchitecture
microcomputers
microprocessor chips
MiteS
Multiple Encryption
networked AP SoC platforms
PCS
personal computers
preventive countermeasure
programming
Protocols
pubcrawl
resilience
Resiliency
return-oriented programming
return-oriented programming attack
software-based microarchitectural attacks
stack protection
system-on-chip
biblio
DVFS as a Security Failure of TrustZone-enabled Heterogeneous SoC
Submitted by grigby1 on Tue, 11/17/2020 - 2:39pm
security
IP networks
Trusted Computing
pubcrawl
Metrics
Resiliency
embedded systems
composability
computer architecture
Instruction sets
hardware trojan
Receivers
resilience
energy consumption
operating systems (computers)
operating systems
operating system
electronic engineering computing
power aware computing
Clocks
system-on-chip
Frequency modulation
ARM TrustZone
AXI bus
DVFS
Dynamic Voltage and Frequency Scaling
embedded system security
frequency regulator
nonsecure ARM core
Regulators
secure ARM core
security failure
TrustZone-enabled heterogeneous SoC
TrustZone-enabled System-on-Chip
voltage regulator
Operating systems security
biblio
Customized Locking of IP Blocks on a Multi-Million-Gate SoC
Submitted by aekwall on Mon, 11/09/2020 - 1:31pm
IP networks
Hardware
security
system-on-chip
Resiliency
pubcrawl
composability
policy-based governance
logic locking
integrated circuits
Logic gates
industrial property
integrated circuit design
Erbium
logic design
IP piracy
industrial designs
integrated circuit manufacture
IP block
multimillion-gate SoC
multiple IP blocks
off-site untrusted fabrication facilities
Solid modeling
VLSI testing
biblio
Security-Driven Task Scheduling for Multiprocessor System-on-Chips with Performance Constraints
Submitted by grigby1 on Mon, 11/02/2020 - 1:36pm
composability
delays
graph theory
Hardware
hardware trojan
industrial property
intellectual property security
IP networks
logic design
malicious inclusions
MPSoC
multiprocessing systems
Multiprocessor System-on-Chips
performance constraints
policy-based governance
Processor scheduling
pubcrawl
resilience
Resiliency
schedule length
Schedules
scheduling
security
security of data
security-driven task scheduling
system level security constraints
System performance
system-on-chip
Task Analysis
task scheduling
Trojan horses
two-stage performance-constrained task scheduling algorithm
biblio
Robust Digital Signature to Protect IP Core against Fraudulent Ownership and Cloning
Submitted by grigby1 on Mon, 11/02/2020 - 12:30pm
composability
consumer electronic devices
crypto digital signature approach
Cryptography
digital signal processing chips
digital signature
digital signature processing cores
digital signatures
DSP
encoding
encryption
fraudulent ownership
industrial property
intellectual property security
IP cloning
IP core
multimedia based reusable Intellectual property cores
multiple security modules
policy-based governance
Protection.
pubcrawl
resilience
Resiliency
robust digital signature
synthesis
system-on-chip
system-on-chips
watermarking approach
biblio
SoCINT: Resilient System-on-Chip via Dynamic Intrusion Detection
Submitted by grigby1 on Mon, 11/02/2020 - 12:29pm
composability
dynamic intrusion detection approach
field programmable gate arrays
FPGA platform
Hardware
Hardware Security
hardware tracing
Hardware Trojans
industrial property
intellectual properties
intellectual property security
Intrusion Detection
IP networks
Monitoring
open source processor
policy-based governance
pubcrawl
Registers
resilience
Resiliency
Runtime system
security
SoCINT
SoCs
software tools
system-on-chip
Trojan horses
biblio
FPGA Bitstream Security: A Day in the Life
Submitted by grigby1 on Mon, 11/02/2020 - 12:29pm
bitstream file
bitstream lifecycle
Bitstream Protection
composability
encryption
field programmable gate arrays
FPGA bitstream security
FPGA designs
FPGA security
industrial property
intellectual properties
intellectual property security
IPS
policy-based governance
pubcrawl
reconfigurable architectures
resilience
Resiliency
security
security concerns
SoC platform
system integrator
system-on-chip
system-on-chip platforms
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