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Cyber-Physical Systems Virtual Organization
Fostering collaboration among CPS professionals in academia, government, and industry
CPS-VO
parallel architectures
biblio
Memory Efficient High-Performance Rotational Image Encryption
Submitted by
grigby1
on Fri, 06/26/2020 - 12:44pm
coalesce
composability
compute unified device architecture
Conferences
Cryptography
CUDA
cyber-physical systems
efficient encryption
encryption
gpu
graphics processing units
high-performance
high-performance device
high-performance reformulations
Image Processing
improved global memory utilization
Instruction sets
memory efficient high-performance rotational image encryption
optimisation
optimization
optimizations
parallel architectures
parallel rotational encryption technique
pubcrawl
Random access memory
real-time applications
real-time systems
resilience
Resiliency
rotated encrypted images
rotational image encryption technique
shadow image
storage management
visual cryptography
biblio
Parallel Implementation of K-Nearest-Neighbors for Face Recognition
Submitted by
grigby1
on Fri, 05/22/2020 - 2:39pm
pubcrawl
Indexes
pattern classification
Classification algorithms
Metrics
Measurement
nearest neighbour methods
face recognition
image classification
graphics processing units
Sorting
nearest neighbor search
countless classification algorithms
Instruction sets
k-nearest-neighbours classifier
KNN classifier
parallel architectures
parallel CUDA implementation
Time complexity
biblio
Provenance Data in the Machine Learning Lifecycle in Computational Science and Engineering
Submitted by
aekwall
on Mon, 03/30/2020 - 11:33am
composability
computational science and engineering
CSE
CUDA cores
data handling
Human behavior
learning (artificial intelligence)
machine learning lifecycle
Metrics
ML lifecycle
parallel architectures
PROV-ML
Provenance
provenance data representation
provenance queries
provenance tracking solutions
pubcrawl
query processing
Resiliency
scientific information systems
workflow management software
workflow provenance
biblio
Data Provenance for Experiment Management of Scientific Applications on GPU
Submitted by
aekwall
on Mon, 03/30/2020 - 11:32am
Monitoring
Memory management
Runtime
Task Analysis
Resiliency
Human behavior
pubcrawl
composability
Metrics
Throughput
Provenance
data provenance
scientific workflow
Instruction sets
application characteristics
application management
co-located applications
CUDA scientific applications
data provenance management
diverse memory usage patterns
execution patterns
experiment management
gpu
GPU environments
GPU memory usage
GPU nodes
GPU runtime environments
graphics processing units
memory virtualization methods
multipurpose applications
natural sciences computing
parallel architectures
pattern change
Physical Memory
resource configuration
runtime configuration
runtime execution
runtime monitoring
scientific applications
biblio
Integration of CPU and GPU to Accelerate RSA Modular Exponentiation Operation
Submitted by
grigby1
on Mon, 12/30/2019 - 2:18pm
accelerating RSA algorithm
Acceleration
central process unit
Complexity theory
compute unified device architecture
CPU
CUDA
Data Security
encryption
encryption efficiency
exponentiation
gpu
GPU parallel programming
graphics process unit
graphics processing units
Mode power operation
parallel architectures
parallel computing
parallel programming
personal information
pubcrawl
public key cryptography
Resiliency
RSA
RSA encryption algorithm
RSA modular exponentiation operation
Scalability
security of data
smart phones
stored information
tools
biblio
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics
Submitted by
grigby1
on Wed, 02/21/2018 - 1:38pm
approximate computing
CNN
compute-intensive data processing
computer architecture
computerised instrumentation
Cryptography
data analysis
Data Security
deep convolutional neural network
electroencephalogram
encrypted data collection
encryption
energy 3.16 pJ
energy conservation
Engines
equivalent reduced instruction set computer operation
Face detection
feature extraction
Fulmine tight power envelope
Internet of Things
Internet-of-Things endpoint
IoT endpoint system-on-chip
low-power electronics
Metrics
Multicore Computing
multicore computing security
near-sensor data analytics pipeline
Neural networks
parallel architectures
pubcrawl
regular computing task
remote recognition
resilience
Resiliency
Scalability
secure autonomous aerial surveillance
security of data
seizure detection
sensitive data protection
sensors
size 65 nm
SoC
software programmability
system-on-chip
tightly-coupled multicore cluster
voltage 0.8 V
biblio
"Application specific processor design for DCT based applications"
Submitted by
grigby1
on Tue, 02/14/2017 - 1:10pm
Application Specific Processor
application specific processor design
Application specific processors
ASP
Channel estimation
DCT based applications
DCT based image watermarking
discrete cosine transform
discrete cosine transforms
Europe
field programmable gate array
field programmable gate arrays
FPGA
Hardware
IDCT hardware
image encryption
image watermarking
JPEG compression
MicroBlaze softcore processer
one dimensional DCT
parallel architecture
parallel architectures
pubcrawl170102
Transform coding
Watermarking
