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Cyber-Physical Systems Virtual Organization
Fostering collaboration among CPS professionals in academia, government, and industry
CPS-VO
silicon-on-insulator
biblio
SRAM voltage scaling for energy-efficient convolutional neural networks
Submitted by
grigby1
on Thu, 06/07/2018 - 2:06pm
approximate SRAM
bit error injection
Bit error rate
CMOS memory circuits
ConvNet training
convolutional neural networks
deep learning
electronic engineering computing
elemental semiconductors
energy conservation
energy-efficient convolutional neural network
energy-quality tradeoff
error resiliency
floating-point classification accuracy
Hardware
Hardware Implementation
IoE platform
learning (artificial intelligence)
low-power electronics
low-power embedded system
memory power intensive
memory size 8 KByte
Micromechanical devices
neural nets
Neural Network Resilience
pubcrawl
Random access memory
resilience
Resiliency
Si
Silicon
silicon-on-insulator
size 28 nm
SRAM chips
SRAM voltage scaling
Training
UTBB FD-SOI CMOS
voltage 310 mV
