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Cyber-Physical Systems Virtual Organization
Fostering collaboration among CPS professionals in academia, government, and industry
CPS-VO
reverse engineering
biblio
Identifying Ubiquitious Third-Party Libraries in Compiled Executables Using Annotated and Translated Disassembled Code with Supervised Machine Learning
Submitted by aekwall on Mon, 02/22/2021 - 12:44pm
Software
Task Analysis
Support vector machines
machine learning
pubcrawl
graph theory
internet
tools
Libraries
supply chain management
neural network
Measurement
Databases
reverse engineering
Predictive Metrics
Microprogramming
Classification algorithms
supervised learning
nearest neighbor search
Bayes method
clustering methods
k-nearest neighbor search
Matrices
vector
biblio
BLESS: A BLE Application Security Scanning Framework
Submitted by grigby1 on Mon, 12/28/2020 - 11:29am
Cryptography
encryption
Internet of Things
security of data
Bluetooth
pubcrawl
Human behavior
resilience
Resiliency
telecommunication security
IoT device
Cryptographic Protocols
authentication
Protocols
public key cryptography
composability
bluetooth low energy
Application Layer
IoT security
secure communication
Biomedical monitoring
bluetooth security
1073 BLE apps
BLE application Security scanning framework
BLE attacks
BLE based devices
BLE Security Scan framework
BLE Security Scanning
BLE-based device
BLESS
Blood pressure
pairing strategies
physical security
reverse engineering
widely adopted wireless communication technology
biblio
Two-Stage Architectures for Resilient Lightweight PUFs
Submitted by aekwall on Mon, 11/16/2020 - 1:59pm
security of data
field programmable gate arrays
Internet of Things
security
invasive software
Resiliency
pubcrawl
machine learning
program testing
Decoding
resilience
reverse engineering
Binary codes
Threshold voltage
Transistors
arbiter PUF
Current Mirror PUF
Differential Comparator PUF
integrated circuit reliability
Maximum likelihood decoding
physical unclonable function (PUF)
Product codes
Resilient Security Architectures
biblio
A Cellular Automata Guided Obfuscation Strategy For Finite-State-Machine Synthesis
Submitted by aekwall on Mon, 11/09/2020 - 12:41pm
security
Resiliency
pubcrawl
composability
policy-based governance
Logic gates
industrial property
automata
Silicon
finite state machines
Additives
flip-flops
reverse engineering
cellular automata
IP piracy
ip protection
cellular automata guided obfuscation strategy
D1*CA
D1*CAdual
digital system
finite-state-machine synthesis
nongroup additive cellular automata
reverse engineering attacks
state-transition
testable key-controlled FSM synthesis scheme
biblio
Mesh Based Obfuscation of Analog Circuit Properties
Submitted by aekwall on Mon, 11/09/2020 - 12:41pm
Cryptography
Resiliency
pubcrawl
composability
policy-based governance
probability
Topology
reverse engineering
computability
operating frequency
Threshold voltage
encryption key
circuit design
IP piracy
2×6 mesh structure
analog circuit properties
Analog circuits
analog obfuscation
analog satisfiability algorithm
aSAT algorithm
auto-determine
Brute Force Attack
circuit functionality
Design methodology
effective transistor dimensions
enhanced security
key based obfuscation technique
LC tank voltage-controlled oscillator
mesh topology
obfuscated circuitry
obfuscated transistors
obfuscation methodology
physical dimensions
SAT
satisfiability modulo theory based algorithm
SMT
target frequency
transistor circuits
transistor sizes
Transistors
varactor transistor
Varactors
VCO
voltage amplitude
voltage-controlled oscillators
biblio
DLockout: A Design Lockout Technique for Key Obfuscated RTL IP Designs
Submitted by aekwall on Mon, 11/09/2020 - 12:40pm
IP networks
Cryptography
Hardware
security
Software
Resiliency
pubcrawl
composability
policy-based governance
logic locking
Computer crime
process control
reverse engineering
Integrated circuit modeling
Registers
logic circuits
controller
IP piracy
applied key
common side-channel attacks
Datapath
datapath intensive IPs
Design Lockout
DLockout
key obfuscated RTL IP designs
key obfuscated RTL module
key obfuscation
key-based obfuscation techniques
legacy IP
nondestructive manner
obfuscation logic output
overproduction
robust design lockout technique
RTL Obfuscation
semiconductor supply chain
storage capacity 128 bit
storage capacity 32 bit
storage capacity 64 bit
typical design corner
biblio
A Novel PUF based Logic Encryption Technique to Prevent SAT Attacks and Trojan Insertion
Submitted by aekwall on Mon, 11/09/2020 - 12:33pm
Cryptography
encryption
Hardware
invasive software
Resiliency
pubcrawl
composability
policy-based governance
Trojan horses
integrated circuits
Hardware Security
Topology
Logic gates
industrial property
reverse engineering
integrated circuit design
logic circuits
Physical Unclonable Function
encryption key
hardware trojan
IP piracy
SAT attack
hardware obfuscation
Anti-Trojan insertion algorithm
Controllability
copy protection
design-for-trust
hardware Trojan insertion
HT insertion
intellectual property/IC
logic encryption methods
logic encryption techniques
logic locking
PUF based logic encryption technique
PUF-based encryption
Rare Signal
reverse engineering attack
unique encryption
biblio
Mystic: Mystifying IP Cores Using an Always-ON FSM Obfuscation Method
Submitted by aekwall on Mon, 11/09/2020 - 12:32pm
IP networks
Hardware
Resiliency
pubcrawl
composability
policy-based governance
Production
Complexity theory
microprocessor chips
Logic gates
obfuscation
reverse engineering
encoding
finite state machines
logic circuits
logic design
size 45.0 nm
Hardware Security
IP piracy
application specific integrated circuits
ASIC technology
circuit complexity
combinational circuits
finite state machine
FSM obfuscation method
hardware obfuscation method
integrated circuit industry
IP overproduction
ITC99 circuit benchmarks
logic encryption
Logic masking
Mystic obfuscation approach
Mystic protection method
mystifying IP cores
biblio
Deceive the Attacker: Thwarting IP Theft in Sieve-Valve-based Biochips
Submitted by grigby1 on Mon, 11/02/2020 - 11:29am
attacker
bioassay developer
bioassay implementation
biochip building blocks
biochips
biological techniques
Biomembranes
bioMEMS
composability
computer network security
control signals
cost-security trade-offs
desieve
highly-skilled-person-hour investment
industrial property
intellectual property rights
intellectual property security
internet
IP networks
IP theft
Lab-on-a-Chip
Microfluidics
Mixers
Multiplexing
obfuscated biochips
policy-based governance
practical sieve-valve based obfuscation
pubcrawl
real-life biochips
resilience
Resiliency
reverse engineering
security of data
Sequential analysis
sieve-valve-based biochips
sieve-valves
Valves
biblio
An Orthogonal Algorithm for Key Management in Hardware Obfuscation
Submitted by grigby1 on Mon, 11/02/2020 - 11:28am
authenticate obfuscation keys
composability
copy protection
Hardware
Hardware Security
industrial property
integrated circuit design
integrated circuits
intellectual property piracy attacks
intellectual property security
IP cores
IP networks
IP piracy
IP piracy attacks
Licenses
member leakage attack
microprocessor chips
orthogonal matrix
Orthogonal obfuscation
orthogonal obfuscation algorithm
partnership organization
policy-based governance
Protocols
pubcrawl
resilience
Resiliency
reverse engineering
security
semiconductor chips
Supply Chain
supply chain management
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