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Managing Hardware Security in Three Dimensional Integrated Circuits
Submitted by Qiaoyan Yu on January 8th, 2020
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Language-Hardware Co-Design for Practical and Verifiable Information Flow Control
Gookwon Suh Submitted by Gookwon Suh on January 8th, 2020
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Invisible Shield Can Compression Harden Deep Neural Networks Universally Against Adversarial Attacks
Submitted by Wujie Wen on January 8th, 2020
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Automatic Synthesis of Verifiably Secure Hardware Accelerators
Submitted by Zhiru Zhang on January 8th, 2020
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Side Channels through Lower-Level Caches Attachs, Defenses and Security Metrics
Submitted by Dmitry Ponomarev on January 7th, 2020
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Practical Hardware-Assisted Always-On Malware Detection
Submitted by Nael Abu-Ghazaleh on January 7th, 2020
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Efficient Hardware-Aware and Hardware-Enabled Algorithms for Secure In-Memory Databases
Submitted by Rajeev Balasubramonian on January 7th, 2020
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TWC: Small: Side-Channels through Lower-Level Caches: Attacks, Defenses and Security Metrics
Submitted by Dmitry Ponomarev on October 21st, 2019
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The Strength of Combined Distinguishers and Combined Side-Channel Attacks
Submitted by Selcuk Kose on October 21st, 2019
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CRII: SaTC: Secure Branch Predictors for High Performance
Submitted by Dmitry Evtyushkin on October 21st, 2019
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