This research aims at hybrid (discrete-continuous) computation for cyber-physical systems. The research augments the today-ubiquitous discrete (digital) model of computation with continuous (analog) computing, which is well-suited to the continuous natural variables involved in cyber-physical systems, and to the error-tolerant nature of computation in such systems. The result is a computing platform on a single silicon chip, with higher energy efficiency, higher speed, and better numerical convergence than is possible with purely discrete computation. The research has several thrusts: (1) Hardware: modern silicon chip technology is used to merge analog computing hardware on the same chip with digital hardware, the latter used for control and co-computation, (2) Architecture: methods are devised for making hybrid computing functionality accessible to the software, (3) Microarchitecture: Choices are made on the granularity, type and organization of analog and hybrid analog-digital functional units, and (4) Concrete application to a realistic cyber-physical system consisting of a team of robots. The research extends modern computer architecture techniques, and advances in mixed analog/digital chip technology mainly developed in the context of communications, to hybrid computing for cyber-physical systems. It brings higher levels of energy efficiency to error-tolerant workloads that future computers will have to handle. The techniques developed can be extended to other systems in which efficient computation is a must, such as weather forecasting and high-energy physics. The work integrates research with education and includes plans for broad dissemination of the results obtained.