Skip to Main Content Area
CPS-VO
Contact Support
Browse
Calendar
Announcements
Repositories
Groups
Search
Search for Content
Search for a Group
Search for People
Search for a Project
Tagcloud
› Go to login screen
Not a member?
Click here to register!
Forgot username or password?
Cyber-Physical Systems Virtual Organization
Fostering collaboration among CPS professionals in academia, government, and industry
CPS-VO
FPGA
biblio
Secure acceleration on cloud-based FPGAs – FPGA enclaves
Submitted by grigby1 on Tue, 06/01/2021 - 2:44pm
encryption
security
pubcrawl
Metrics
resilience
Resiliency
field programmable gate arrays
FPGA
Hardware
system-on-chip
Cloud Security
Computational modeling
composability
Concurrency
Hardware Security
Confidential computing
enclaves
FAA
biblio
Application of the Aho-Corasick algorithm to create a network intrusion detection system
Submitted by grigby1 on Tue, 05/25/2021 - 3:25pm
algorithm Aho-Corasick
collaboration
composability
cryptology
field programmable gate arrays
FPGA
Hardware
Human behavior
Human Factors
imprecise matching
information science
Memory management
Metrics
network intrusion detection
NIDS
pattern matching
precise matching
pubcrawl
resilience
Resilient
Scalability
Throughput
biblio
Stealthy-Shutdown: Practical Remote Power Attacks in Multi - Tenant FPGAs
Submitted by aekwall on Thu, 05/13/2021 - 11:36am
field programmable gate arrays
FPGA
Task Analysis
Resiliency
pubcrawl
Metrics
tools
sensors
Scalability
Acceleration
Power demand
Threshold voltage
attack surface
Denial-of-Service
multi-tenant
power attack
side-channel
biblio
Nested Pipeline Hardware Self-Organizing Map for High Dimensional Vectors
Submitted by aekwall on Mon, 03/22/2021 - 1:10pm
field programmable gate arrays
FPGA
Hardware
computer architecture
Resiliency
pubcrawl
Neurons
clustering
Vectors
Pipelines
expandability
Compositionality
Clocks
pipeline processing
MNIST
self-organising feature maps
Self-organizing feature maps
frequency 60.0 MHz
fully parallel computation
high dimensional vectors
homogeneous modular structure
low-dimensional vectors
multiple clocks
nested architecture
nested pipeline hardware self-organizing map
neural chips
neural net architecture
operable clock frequency
original nested SOM
pipeline computation
Self-Organizing Map
sequential computation
single vector
VHDL
weight vector update
biblio
Hardware Implementation of Cancellable Biometric Systems
Submitted by aekwall on Tue, 03/09/2021 - 11:56am
biometric encryption
3D chaotic map
3D chaotic mapping
Biological system modeling
biometrics (access control)
Cancellable biometrics
Cryptography
encryption
face encryption
field programmable gate arrays
fingerprint encryption
FPGA
FPGA model
Hardware
Hardware Implementation
Information encryption
Metrics
one-way cancellable biometric template system
pubcrawl
Resiliency
Scalability
security applications
security systems
Three-dimensional displays
Watermarking
biblio
Horizontal Correlation Analysis of Elliptic Curve Diffie Hellman
Submitted by aekwall on Mon, 02/15/2021 - 4:57pm
field programmable gate arrays
FPGA
Scalability
Internet of Things
Hardware
Cryptographic Protocols
Resiliency
pubcrawl
Metrics
Correlation
public key cryptography
Elliptic curve cryptography
Elliptic curves
finite element analysis
correlation methods
Secret key
IoT systems
AES
Artix-7 FPGA
chipwhisperer
correlation power analysis
crypto algorithm
CW toolchain
distributed entities
ECDH
elliptic curve diffie hellman
Elliptic Curve Diffie Hellman key exchange protocol
HCPA
Horizontal Correlation Analysis
Horizontal Correlation Power Analysis
in-field sensors
key guess
maximum correlation
NewAE Technologies
open source toolchain
potential threat
power traces
revolutionary technology transition
secure connectivity
side channel analysis
side-channel leaks
simple power analysis
word length -128.0 bit
biblio
FPGA Implementation of Internet Key Exchange Based on Chaotic Cryptosystem
Submitted by grigby1 on Fri, 01/22/2021 - 1:52pm
chaotic cryptography
pubcrawl
4-dimension chaotic system
chaotic communication
chaotic cryptosystem
chaotic cryptosystem solution
computer network security
Cryptographic Protocols
Cryptography
data phase transfer
DH-HEMTs
field programmable gate arrays
FPGA
FPGA implementation
IKE
IKE protocol
internet
Internet key exchange protocol
IPsec
IPSec protocol
keys phase exchange
man in the middle attack
network communication domain
network protocol
Protocols
SA
securing communications
security association attack
Synchronization
word length 128 bit
biblio
Cryptography by Synchronization of Hopfield Neural Networks that Simulate Chaotic Signals Generated by the Human Body
Submitted by grigby1 on Fri, 01/22/2021 - 1:50pm
chaotic cryptography
pubcrawl
asymmetric cryptography method
chaotic communication
chaotic signal simulation
chaotic synchronization
Cryptography
dynamic systems
Dynamical Systems
encryption circuit
field programmable gate arrays
FPGA
Hopfield neural nets
Hopfield neural networks
human body
information security
Neural networks
random number generation
random number sequence
reconfigurable architectures
reconfigurable hardware
synchronisation
Synchronization
biblio
Efficient Reed-Muller Implementation for Fuzzy Extractor Schemes
Submitted by aekwall on Mon, 01/18/2021 - 11:34am
field programmable gate arrays
FPGA
Scalability
Cryptography
Internet-of-Things
security
Table lookup
Resiliency
pubcrawl
Metrics
counterfeiting
Decoding
fuzzy set theory
security problem
electronic devices
error correction codes
PUF
physical unclonable functions
Distributed Applications
Hamming distance
attack models
area constraints
delay constraints
efficient Reed-Muller implementation
fuzzy extraction scheme
fuzzy extractor schemes
fuzzy-extractor
immunity
intrinsic hardware security
medium-range FPGA device
physical tampering
PUF circuits
PUF implementations
Reed-Muller
Reed-Muller codes
Reed-Muller ECC design
responses stability
Fuzzy Cryptography
biblio
RISC-V FPGA Platform Toward ROS-Based Robotics Application
Submitted by grigby1 on Thu, 12/17/2020 - 2:01pm
Cloud Computing
cloud-based FPGA environment
embedded systems
field programmable gate arrays
FPGA
Human behavior
Human Factors
instruction set computer
local FPGA platform
microprocessor chips
open source community members
open source operating system
open standard instruction set architecture
policy-based governance
pubcrawl
reduced instruction set computing
resilience
Resiliency
RISC-V
RISC-V CPU architecture
RISC-V foundation
RISC-V FPGA platform
RISC-V processor
Robot Operating System
robot operating systems
robotics system
robots
ROS
ROS-based Robotics application
security
super computing field
1
2
3
4
5
6
7
next ›
last »
