FPGA

biblio

DoS attack mitigation in SDN networks using a deeply programmable packet-switching node based on a hybrid FPGA/CPU data plane architecture

Submitted by aekwall on Mon, 06/29/2020 - 12:57pm

computer network security
DDoS
field programmable gate arrays
FPGA
firewall
telecommunication traffic
authorisation
Hardware
Software
computer architecture
computer network management
SDN network
software defined networking
Resiliency
Human behavior
pubcrawl
composability
Metrics
internet
Filtering
software-defined networking
SDN
Firewalls (computing)
DoS
Software-Defined Networks
5G
data plane
denial-of-service attack
denial-of-service attacks
architectural model
deep network programmability
deeply programmable packet-switching node
DoS attack mitigation
DoS attack redirection
DoS attacks mitigation
DoS traffic
DPN
packet switching
packet-switching nodes
switches price
DDoS attack mitigation

biblio

Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs

Submitted by grigby1 on Fri, 06/12/2020 - 12:09pm

Compositionality
Cryptography
fast reconfigurable hash functions
field programmable gate array
field programmable gate arrays
FPGA
genetic algorithms
genetic programming
Hardware
hardware acceleration
hash algorithms
hash function design
high speed computer networks
high-quality hash functions
IP networks
Linear programming
Monitoring
multiobjective linear genetic programming
network flow hashing
pubcrawl
reconfigurable architectures
reconfigurable design
reconfigurable hash function
Registers
resilience
Resiliency

biblio

A Nearest Neighbor Search Engine Using Distance-Based Hashing

Submitted by grigby1 on Fri, 05/22/2020 - 2:38pm

pubcrawl
FPGA
field programmable gate arrays
parallel processing
Metrics
Measurement
nearest neighbour methods
search engines
search problems
query processing
file organisation
nearest neighbor search
nearest neighbor search algorithm
distance based hashing
flexible distance-based hashing
FPGA-based nearest neighbor search engine
hardware search engine
high-dimensional data
query point

biblio

Design of a Chaotic Oscillator based Model Building Attack Resistant Arbiter PUF

Submitted by grigby1 on Fri, 04/24/2020 - 12:02pm

arbiter PUF
chaos
chaotic behaviour
chaotic oscillator
Chua's Oscillator
Chua's oscillator circuit
composability
conventional machine learning
Cryptography
field programmable gate arrays
FPGA
Integrated circuit modeling
learning (artificial intelligence)
Mathematical model
Measurement
Metrics
Modeling Attacks
Monte Carlo analysis
Monte Carlo methods
oscillating behaviors
oscillating systems
Oscillators
physical unclonable functions
privacy
pubcrawl
PUF
PUF architecture
resilience
Resiliency
Resistance
security
security of data
Unclonability

biblio

Research on LED lightweight cryptographic algorithm based on RFID tag of Internet of things

Submitted by aekwall on Mon, 03/23/2020 - 1:33pm

Algorithm
Boolean expression reconstruction
Boolean functions
Ciphers
Cryptography
Differential Power Analysis
DPA attack
DPA protection technology threshold
field programmable gate arrays
FPGA
Human behavior
Internet of Things
InvS-box
LED lightweight cryptographic algorithm
LED lightweight cryptography
light emitting diodes
Piccolo cryptographic algorithm
pubcrawl
radio frequency identification tags
radiofrequency identification
Resiliency
RFID tag
RFID tag chip
RFID tags
RFIDs
search problems

biblio

SCR-QRNG: Side-Channel Resistant Design using Quantum Random Number Generator

Submitted by aekwall on Mon, 03/23/2020 - 1:21pm

FPGA
Scalability
Cryptography
Resiliency
Human behavior
pubcrawl
Metrics
Entropy
random number generation
BSI AIS 31
clock frequency modulation
deterministic random bit generator
NIST SP 800-22/90B
PCB module
power side-channel attack and countermeasure
power side-channel attacks
QRNG
quantum entropy chip
quantum entropy source
Quantum random number generator
radioactive decay
radioactive isotope decay
random frequency clock generator
random masking
random number generators
SCR-QRNG framework
security primitives
side-channel countermeasures
side-channel leakages
side-channel resistant design
side-channel resistant primitives
side-channel resistant QRNG
unbiased random numbers
random key generation

biblio

A System Design of Real-Time Narrowband Rfi Detection And Mitigation for Gnss-R Receiver

Submitted by grigby1 on Wed, 02/26/2020 - 4:44pm

Band-pass filters
band-stop filters
cascading IIR band-stop filters
cGNSS-R
continuous wave interference
conventional GNSS-R
CWI
DDM
delay-Doppler map
detection
field programmable gate arrays
fixed-point implementation
FPGA
Global navigation satellite system
Global Navigation Satellite Systems-reflectometry
GNSS-R
Human behavior
Human Factors
iGNSS-R
IIR BSF
IIR filters
IIR notch filter
interference suppression
interferometric GNSS-R receivers
Metrics
mitigation
NF
Passband
pubcrawl
radio detection
radio receivers
radiofrequency interference
real-time narrowband radiofrequency interference detection
real-time narrowband radiofrequency interference mitigation
real-time NB RFI detection
real-time NB RFI mitigation
Receivers
resilience
Resiliency
RFI
satellite navigation
signal-to-noise ratio
SNR
system analysis and design
system design
threat mitigation
white narrowband interference
Wireless communication
WNBI

biblio

Hardware implementation of Piccolo Encryption Algorithm for constrained RFID application

Submitted by aekwall on Mon, 02/10/2020 - 11:44am

IoT
field programmable gate arrays
FPGA
Cryptography
encryption
Internet of Things
telecommunication security
Hardware
Table lookup
IoT applications
smart devices
Resiliency
pubcrawl
composability
security applications
RFID
Throughput
Ciphers
security issues
Predictive Metrics
private information
word length 128.0 bit
Hardware Implementation
hardware resources
lightweight cryptographic algorithms
S-box
lightweight cryptography
128 bits
4 input LUTs
64 bits block size
area optimization
ASIC
constrained RFID application
different design strategies
efficient hardware architecture
Fiestel structure
hardware design
hardware metrics
low resource applications
optimized area
Piccolo Algorithm
piccolo encryption algorithm
piccolo lightweight algorithm
radiofrequency identification
relevant lightweight block ciphers
severe security concerns
supports high speed
Throughput.
tremendous pace
ultra-lightweight applications
variable key size
word length 64.0 bit
word length 80.0 bit
Xillinx
Microelectronics Security

biblio

Research in Fast Modular Exponentiation Algorithm Based on FPGA

Submitted by grigby1 on Tue, 01/21/2020 - 11:50am

automation
Conferences
Erbium
exponentiation
fast modular exponentiation algorithm
field programmable gate arrays
FPGA
frequency 170.0 MHz
logic design
mechatronics
modular exponentiation
modular exponentiation on large number
Modular Multiplication
Montgomery algorithm
Montgomery modular multiplication
pubcrawl
public key cryptography
public-key algorithm
public-key cryptography
public-key cryptosystem
Q measurement
resilience
Resiliency
Scalability
systolic array
systolic arrays

biblio

Extracting Side-Channel Leakage from Round Unrolled Implementations of Lightweight Ciphers

Submitted by aekwall on Mon, 01/20/2020 - 11:59am

advanced encryption standard
AES
AES algorithm
Band-pass filters
Ciphers
combinational logics
Correlation
correlation frequency analysis
Cryptography
edge nodes
encryption
Energy Efficiency
field programmable gate arrays
Filtering
first-order side-channel leakages
FPGA
fully-unrolled datapath
Hardware
improved CFA attack
leakage models
Lightweight Ciphers
lightweight cryptographic algorithms
multiband narrow bandpass filtering techniques
narrow bandpass filtering
optimal leakage models
parallel round-based datapath
PRINCE
pubcrawl
Resiliency
resource constraints
round unrolled implementations
round unrolling
Scalability
side channel analysis
side channel analysis attacks
side channel signatures
side-channel leakage
signal isolation
Signal to noise ratio
signal-to-noise ratio
SIMON
SIMON datapaths
size 45.0 nm
SNR
time domain correlation power analysis

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Cyber-Physical Systems Virtual Organization

Fostering collaboration among CPS professionals in academia, government, and industry

FPGA

DoS attack mitigation in SDN networks using a deeply programmable packet-switching node based on a hybrid FPGA/CPU data plane architecture

Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs

A Nearest Neighbor Search Engine Using Distance-Based Hashing

Design of a Chaotic Oscillator based Model Building Attack Resistant Arbiter PUF

Research on LED lightweight cryptographic algorithm based on RFID tag of Internet of things

SCR-QRNG: Side-Channel Resistant Design using Quantum Random Number Generator

A System Design of Real-Time Narrowband Rfi Detection And Mitigation for Gnss-R Receiver

Hardware implementation of Piccolo Encryption Algorithm for constrained RFID application

Research in Fast Modular Exponentiation Algorithm Based on FPGA

Extracting Side-Channel Leakage from Round Unrolled Implementations of Lightweight Ciphers