Abstract: Shared hardware resources like caches and memory introduce timing unpredictability for real-time systems. Worst-case execution time (WCET) analysis with shared hardware resources is often so pessimistic that the extra processing capacity of multicore systems is negated. We propose techniques to improve performance and schedulability for multicore systems.

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Abstract: The present day technology falls short in offering centimeter scale mobile robots that can function effectively under unknown and dynamic environmental conditions.

Abstract: The objective of this project is to develop a distributed algorithmic framework, supported by a highly fault-tolerant software system, for executing critical transmission-level operations of the North American power grid using gigantic volumes of Synchrophasor data.

Abstract:  Understanding failure in protection system using Temporal Causal Diagrams  Situational  awareness  in  large  electrical  systems  and  eventual  fault  source  identification  and  possibly prognostics is a very challenging problem. State of the art relies on a network of protection devices that include relays to detect anomalies and engage circuit breakers to isolate the faulty component(s) in the system.

Abstract: The aims of this project are to contribute the fundamental physical and algorithmic building blocks of a novel cyber-­‐physical two-­‐way communication platform designed to enable accurate training and monitoring of canines. The project efforts lie at the intersection of computer science, electrical engineering, and veterinary behavior.

Abstract: Shared hardware resources like caches and translation look aside buffers (TLBs) introduce timing unpredictability for real-time systems. We propose techniques to mitigate unpredictabil- ity for multicore systems. The TLB improves the performance of the system by caching the virtual page to physical frame mapping. But TLBs present a source of unpredictability for real-rime systems. Standard heap allocated regions do not provide guarantees on the TLB set that will hold a particular page translation.